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Date:   Thu, 22 Dec 2022 08:11:16 +0000
From:   JiaJie Ho <jiajie.ho@...rfivetech.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Olivia Mackall <olivia@...enic.com>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC:     Emil Renner Berthing <kernel@...il.dk>,
        Conor Dooley <conor.dooley@...rochip.com>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
Subject: RE: [PATCH 3/3] riscv: dts: starfive: Add TRNG node for VisionFive 2



> -----Original Message-----
> From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Sent: Wednesday, December 21, 2022 5:48 PM
> To: JiaJie Ho <jiajie.ho@...rfivetech.com>; Olivia Mackall
> <olivia@...enic.com>; Herbert Xu <herbert@...dor.apana.org.au>; Rob
> Herring <robh+dt@...nel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt@...aro.org>
> Cc: Emil Renner Berthing <kernel@...il.dk>; Conor Dooley
> <conor.dooley@...rochip.com>; linux-crypto@...r.kernel.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-
> riscv@...ts.infradead.org
> Subject: Re: [PATCH 3/3] riscv: dts: starfive: Add TRNG node for VisionFive 2
> 
> > +
> > +		rng: rng@...0c000 {
> > +			compatible = "starfive,jh7110-trng";
> > +			reg = <0x0 0x1600C000 0x0 0x4000>;
> > +			clocks = <&stgcrg JH7110_STGCLK_SEC_HCLK>,
> > +				 <&stgcrg JH7110_STGCLK_SEC_MISCAHB>;
> > +			clock-names = "hclk", "ahb";
> > +			resets = <&stgcrg
> JH7110_STGRST_SEC_TOP_HRESETN>;
> > +			interrupts = <30>;
> > +			status = "okay";
> 
> Drop. It's by default.
> 
I'll fix this in v2.

Thanks,
Jia Jie

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