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Message-ID: <1671702170-24781-5-git-send-email-quic_srivasam@quicinc.com>
Date: Thu, 22 Dec 2022 15:12:47 +0530
From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To: <agross@...nel.org>, <andersson@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_rohkumar@...cinc.com>,
<srinivas.kandagatla@...aro.org>, <dianders@...omium.org>,
<swboyd@...omium.org>, <judyhsiao@...omium.org>,
<konrad.dybcio@...aro.org>
CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH 4/7] arm64: dts: qcom: sc7280: audioreach: Update lpasscc reg property
Update lpasscc register mapping for avoiding memory regions conflict with
ADSP pil node.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 0ce8755..a750f05 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -111,6 +111,14 @@
};
};
+&lpasscc {
+ reg = <0 0x03c04000 0 0x4>,
+ <0 0x032a9000 0 0x1000>;
+ reg-names = "top_cc", "reset-cgcr";
+ #reset-cells = <1>;
+ status = "okay";
+};
+
&soc {
qcom,lpass@...0000 {
compatible = "qcom,sc7280-adsp-pil";
--
2.7.4
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