lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20221222123244.147238-3-emekcan.aras@arm.com>
Date:   Thu, 22 Dec 2022 12:32:44 +0000
From:   Emekcan Aras <emekcan.aras@....com>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Liviu Dudau <liviu.dudau@....com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Sudeep Holla <sudeep.holla@....com>,
        Miguel Silva <rui.silva@...aro.org>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Emekcan Aras <emekcan.aras@....com>
Subject: [PATCH v3 2/2] dt-bindings: Add Arm corstone500 platform

Add bindings to describe implementation of
the ARM Corstone500 platform.

Signed-off-by: Emekcan Aras <emekcan.aras@....com>
---
 .../bindings/arm/arm,corstone500.yaml         | 30 +++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/arm,corstone500.yaml

diff --git a/Documentation/devicetree/bindings/arm/arm,corstone500.yaml b/Documentation/devicetree/bindings/arm/arm,corstone500.yaml
new file mode 100644
index 000000000000..cfe41f7760fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/arm,corstone500.yaml
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/arm,corstone500.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Corstone500
+
+maintainers:
+  - Emekcan Aras <emekcan.aras@....com>
+  - Rui Miguel Silva <rui.silva@...aro.org>
+
+description: |+
+  Corstone-500 is an ideal starting point for feature rich System on Chip
+  (SoC) designs based on the Cortex-A5 core. These designs can be used in
+  Internet of Things (IoT) and embedded products.
+
+  Corstone-500 includes most of the Arm IP in the SSE-500 subsystem and
+  example integration layer, an FPGA, and access to modelling options.
+
+properties:
+  $nodename:
+    const: '/'
+  compatible:
+    items:
+      - const: arm,corstone500
+
+additionalProperties: true
+
+...
-- 
2.25.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ