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Date:   Thu, 22 Dec 2022 17:14:14 +0200
From:   Jarkko Nikula <jarkko.nikula@...ux.intel.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        Hanna Hawa <hhhawa@...zon.com>
Cc:     wsa@...nel.org, mika.westerberg@...ux.intel.com, jsd@...ihalf.com,
        linus.walleij@...aro.org, ben-linux@...ff.org,
        linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org,
        dwmw@...zon.co.uk, benh@...zon.com, ronenk@...zon.com,
        talel@...zon.com, jonnyc@...zon.com, hanochu@...zon.com,
        farbere@...zon.com, itamark@...zon.com, lareine@...zon.com
Subject: Re: [PATCH v5 1/1] i2c: designware: use casting of u64 in clock
 multiplication to avoid overflow

On 12/21/22 22:07, Andy Shevchenko wrote:
> On Wed, Dec 21, 2022 at 07:59:00PM +0000, Hanna Hawa wrote:
>> From: Lareine Khawaly <lareine@...zon.com>
>>
>> In functions i2c_dw_scl_lcnt() and i2c_dw_scl_hcnt() may have overflow
>> by depending on the values of the given parameters including the ic_clk.
>> For example in our use case where ic_clk is larger than one million,
>> multiplication of ic_clk * 4700 will result in 32 bit overflow.
>>
>> Add cast of u64 to the calculation to avoid multiplication overflow, and
>> use the corresponding define for divide.
> 
> Perfect, thank you!
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> 
Acked-by: Jarkko Nikula <jarkko.nikula@...ux.intel.com>

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