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Message-ID: <fc0ec71a-89f9-f201-c4e6-b5594bfc0c35@starfivetech.com>
Date: Fri, 23 Dec 2022 15:49:14 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: Conor Dooley <conor@...nel.org>
CC: <linux-riscv@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>, Palmer Dabbelt <palmer@...belt.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stephen Boyd <sboyd@...nel.org>,
"Michael Turquette" <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 04/11] reset: starfive: Factor out common JH71X0 reset
code
On Tue, 20 Dec 2022 22:28:48 +0000, Conor Dooley wrote:
> On Tue, Dec 20, 2022 at 08:50:47AM +0800, Hal Feng wrote:
> > From: Emil Renner Berthing <kernel@...il.dk>
> >
> > The StarFive JH7100 SoC has additional reset controllers for audio and
> > video, but the registers follow the same structure. On the JH7110 the
> > reset registers don't get their own memory range, but instead follow the
> > clock control registers. The registers still follow the same structure
> > though, so let's factor out the common code to handle all these cases.
>
> Is it a bit ornery to want to see this as a movement and an extraction
> in two different patches? Would prob be easier to follow that way.
Definitely, it will be more readable and easier to review. OK, I split it
in the next version.
Best regards,
Hal
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