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Message-ID: <9b435fb2-9ba9-e985-e132-e10f793ca659@linaro.org>
Date:   Fri, 23 Dec 2022 10:14:01 +0100
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>,
        agross@...nel.org, andersson@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        quic_rohkumar@...cinc.com, srinivas.kandagatla@...aro.org,
        dianders@...omium.org, swboyd@...omium.org, judyhsiao@...omium.org,
        konrad.dybcio@...aro.org
Subject: Re: [PATCH 5/7] arm64: dts: qcom: sc7280: audioreach: Add CGCR reset
 property

On 22/12/2022 10:42, Srinivasa Rao Mandadapu wrote:
> Add CGCR register reset property for both RX and TX soundwire
> slave devices.
> 
> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
> Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
> ---
> This patch depends on:
>     -- https://lore.kernel.org/linux-clk/1671618061-6329-1-git-send-email-quic_srivasam@quicinc.com/
> 
>  .../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> index a750f05..ce5d69e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
> @@ -217,3 +217,12 @@
>  		};
>  	};
>  };
> +
> +&swr0 {
> +	resets = <&lpasscc LPASS_AUDIO_SWR_RX_CGCR>;
> +};
> +
> +&swr1 {

Why here not in SoC DTSI?

> +	resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
> +};
> +

Are you adding stray new lines?

Best regards,
Krzysztof

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