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Message-ID: <20221223015029.24978-2-biao.huang@mediatek.com>
Date: Fri, 23 Dec 2022 09:50:28 +0800
From: Biao Huang <biao.huang@...iatek.com>
To: Andrew Lunn <andrew@...n.ch>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
"David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
"Jakub Kicinski" <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Richard Cochran <richardcochran@...il.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
"Biao Huang" <biao.huang@...iatek.com>, <macpaul.lin@...iatek.com>
Subject: [PATCH v5 1/2] stmmac: dwmac-mediatek: enable 2ns delay only for special cases
In current driver, MAC will always enable 2ns delay in RGMII mode,
but that will lead to transmission failures for "rgmii-id"/"rgmii-txid"
cases.
Modify the implementation of fix_mac_speed() to ensure the 2ns delay
will only take effect for "rgmii-rxid"/"rgmii" cases, then user can
choose phy-mode freely.
Fixes: f2d356a6ab71 ("stmmac: dwmac-mediatek: add support for mt8195")
Signed-off-by: Biao Huang <biao.huang@...iatek.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
index d42e1afb6521..cde4fb81d596 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c
@@ -447,7 +447,9 @@ static void mt8195_fix_mac_speed(void *priv, unsigned int speed)
{
struct mediatek_dwmac_plat_data *priv_plat = priv;
- if ((phy_interface_mode_is_rgmii(priv_plat->phy_mode))) {
+ switch (priv_plat->phy_mode) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
/* prefer 2ns fixed delay which is controlled by TXC_PHASE_CTRL,
* when link speed is 1Gbps with RGMII interface,
* Fall back to delay macro circuit for 10/100Mbps link speed.
@@ -462,6 +464,9 @@ static void mt8195_fix_mac_speed(void *priv, unsigned int speed)
MT8195_RGMII_TXC_PHASE_CTRL);
else
mt8195_set_delay(priv_plat);
+ break;
+ default:
+ break;
}
}
--
2.25.1
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