linux-kernel - RE: [RFC PATCH 23/32] x86/fred: update MSR_IA32_FRED

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Message-ID: <SN7PR11MB8067ED3FA4F69BA1B72A6EEEA8EE9@SN7PR11MB8067.namprd11.prod.outlook.com>
Date:   Sat, 24 Dec 2022 03:02:55 +0000
From:   "Li, Xin3" <xin3.li@...el.com>
To:     "H. Peter Anvin" <hpa@...or.com>,
        Peter Zijlstra <peterz@...radead.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "x86@...nel.org" <x86@...nel.org>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "bp@...en8.de" <bp@...en8.de>,
        "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
        "andrew.cooper3@...rix.com" <andrew.cooper3@...rix.com>,
        "Christopherson,, Sean" <seanjc@...gle.com>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "Shankar, Ravi V" <ravi.v.shankar@...el.com>
Subject: RE: [RFC PATCH 23/32] x86/fred: update MSR_IA32_FRED_RSP0 during task
 switch


> >> diff --git a/arch/x86/include/asm/switch_to.h
> >> b/arch/x86/include/asm/switch_to.h
> >> index c08eb0fdd11f..c28170d4fbba 100644
> >> --- a/arch/x86/include/asm/switch_to.h
> >> +++ b/arch/x86/include/asm/switch_to.h
> >> @@ -71,9 +71,13 @@ static inline void update_task_stack(struct task_struct
> *task)
> >>  	else
> >>  		this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);  #else
> >> -	/* Xen PV enters the kernel on the thread stack. */
> >> -	if (static_cpu_has(X86_FEATURE_XENPV))
> >> +	if (cpu_feature_enabled(X86_FEATURE_FRED)) {
> >> +		wrmsrl(MSR_IA32_FRED_RSP0,
> >> +		       task_top_of_stack(task) +
> TOP_OF_KERNEL_STACK_PADDING);
> >
> >Urgh, I'm assuming this is a *fast* MSR ?
> >
> >> +	} else if (static_cpu_has(X86_FEATURE_XENPV)) {
> >> +		/* Xen PV enters the kernel on the thread stack. */
> >>  		load_sp0(task_top_of_stack(task));
> >> +	}
> >>  #endif
> >
> >
> 
> The performance here will be addressed by WRMSRNS/WRMSRLIST. It is not
> included in the FRED patchset simply because there is a separate, parallel
> enabling effort going on for those instructions (which are useful in their own
> right, especially for perf, and may be available before FRED) and we don't want
> unnecessary collisions.
> 
> Those instructions weren't public when I wrote the first version of this patchset,
> but they are now in the ISE documentation.
> 
> Xin, could you add that note to the patch documentation?

Will do!