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Message-ID: <202212241136.p5w059i1-lkp@intel.com>
Date:   Sat, 24 Dec 2022 11:48:29 +0800
From:   kernel test robot <lkp@...el.com>
To:     Hal Feng <hal.feng@...rfivetech.com>,
        linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-clk@...r.kernel.org
Cc:     llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
        Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        Hal Feng <hal.feng@...rfivetech.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 05/11] reset: starfive: Rename "jh7100" to "jh71x0"
 for the common code

Hi Hal,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 830b3c68c1fb1e9176028d02ef86f3cf76aa2476]

url:    https://github.com/intel-lab-lkp/linux/commits/Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
base:   830b3c68c1fb1e9176028d02ef86f3cf76aa2476
patch link:    https://lore.kernel.org/r/20221220005054.34518-6-hal.feng%40starfivetech.com
patch subject: [PATCH v3 05/11] reset: starfive: Rename "jh7100" to "jh71x0" for the common code
config: riscv-rv32_defconfig
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project f5700e7b69048de958172fb513b336564e7f8709)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/d3dcb30354b5f53a536ca6db2fa04710494cabe0
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
        git checkout d3dcb30354b5f53a536ca6db2fa04710494cabe0
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/reset/starfive/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@...el.com>

All warnings (new ones prefixed by >>):

>> drivers/reset/starfive/reset-starfive-jh71x0.c:106:5: warning: no previous prototype for function 'reset_starfive_jh71x0_register' [-Wmissing-prototypes]
   int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
       ^
   drivers/reset/starfive/reset-starfive-jh71x0.c:106:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
   ^
   static 
   1 warning generated.


vim +/reset_starfive_jh71x0_register +106 drivers/reset/starfive/reset-starfive-jh71x0.c

   105	
 > 106	int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

View attachment "config" of type "text/plain" (114207 bytes)

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