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Message-ID: <a65632b8-3303-c45a-8877-85fdf5527db0@linaro.org>
Date: Sun, 25 Dec 2022 12:56:15 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Hal Feng <hal.feng@...rfivetech.com>,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org
Cc: Conor Dooley <conor@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Ben Dooks <ben.dooks@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>, Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Linus Walleij <linus.walleij@...aro.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 6/7] riscv: dts: starfive: Add initial StarFive JH7110
device tree
On 25/12/2022 11:31, Hal Feng wrote:
>
> gmac0_rmii_refin: clock {
> ...
> };
>
> gmac0_rgmii_rxin: clock {
> ...
> };
> ...
>
>> nothing. It looks like you avoid to define proper clock controller.
>> What's the point for all these clocks? These are no-op.
>
> These are all external fixed rate clocks inputted to the SoC. They are the root
If they are all external, then it is fine.
>
>>
>>> + compatible = "fixed-clock";
>>> + #clock-cells = <0>;
>>> + };
Best regards,
Krzysztof
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