[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20221226095745.19757-3-a-bhatia1@ti.com>
Date: Mon, 26 Dec 2022 15:27:45 +0530
From: Aradhya Bhatia <a-bhatia1@...com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC: Tomi Valkeinen <tomba@...nel.org>,
Samuel Holland <samuel@...lland.org>,
Maxime Ripard <mripard@...nel.org>,
Linux Clock List <linux-clk@...r.kernel.org>,
Devicetree List <devicetree@...r.kernel.org>,
Linux Kernel List <linux-kernel@...r.kernel.org>,
Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Devarsh Thakkar <devarsht@...com>,
Jai Luthra <j-luthra@...com>, Aradhya Bhatia <a-bhatia1@...com>
Subject: [PATCH 2/2] clk: fixed-factor: Re-introduce support for clocks to set parent clock-rate
Add support for the clock "ti,k3-am62-oldi-clk-div".
Also add support for this clock to propagate the clock set request to
its parent clock, by setting the CLK_SET_RATE_PARENT flag.
Signed-off-by: Aradhya Bhatia <a-bhatia1@...com>
---
drivers/clk/clk-fixed-factor.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index f734e34735a9..1a78e2d870dd 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -245,10 +245,16 @@ struct clk_hw *devm_clk_hw_register_fixed_factor(struct device *dev,
EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor);
#ifdef CONFIG_OF
+static const struct of_device_id set_rate_parent_matches[] = {
+ { .compatible = "ti,k3-am62-oldi-clk-div" },
+ { /* Sentinel */ },
+};
+
static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
{
struct clk_hw *hw;
const char *clk_name = node->name;
+ unsigned long flags = 0;
u32 div, mult;
int ret;
@@ -264,10 +270,13 @@ static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node)
return ERR_PTR(-EIO);
}
+ if (of_match_node(set_rate_parent_matches, node))
+ flags |= CLK_SET_RATE_PARENT;
+
of_property_read_string(node, "clock-output-names", &clk_name);
hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, NULL, 0,
- 0, mult, div, false);
+ flags, mult, div, false);
if (IS_ERR(hw)) {
/*
* Clear OF_POPULATED flag so that clock registration can be
--
2.39.0
Powered by blists - more mailing lists