linux-kernel - Re: [PATCH v3 0/7] Basic device tree support for StarFive JH7110 RISC-V SoC

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Date:   Mon, 26 Dec 2022 23:01:51 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Hal Feng <hal.feng@...rfivetech.com>
Cc:     linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Ben Dooks <ben.dooks@...ive.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>, Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Emil Renner Berthing <emil.renner.berthing@...onical.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/7] Basic device tree support for StarFive JH7110
 RISC-V SoC

On Tue, Dec 20, 2022 at 09:12:40AM +0800, Hal Feng wrote:
> This patch series adds basic device tree support for StarFive JH7110 SoC.
> This patch series depends on series [1] and [2]. You can simply get or
> review the patches at the link [3].
> Emil Renner Berthing (7):
>   dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board

I've applied this one to riscv-dt-for-next
https://git.kernel.org/conor/c/97b7ed072784

>   dt-bindings: timer: Add StarFive JH7110 clint
>   dt-bindings: interrupt-controller: Add StarFive JH7110 plic

>   dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
>   soc: sifive: ccache: Add StarFive JH7110 support

And these two to riscv-soc-for-next
https://git.kernel.org/conor/c/1caf002efa22
https://git.kernel.org/conor/c/6635e91648ce

>   riscv: dts: starfive: Add initial StarFive JH7110 device tree
>   riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device
>     tree

The rest I can take with maintainer Acks alongside the DT, or they can
go via subsystem trees.
The DT is waiting for the clock/reset & pinctrl binding headers anyway,
so IDC which it is.

Thanks,
Conor.


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