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Message-ID: <134a2ead-e272-c32e-b14f-a9e98c8924ac@starfivetech.com>
Date: Tue, 27 Dec 2022 17:38:30 +0800
From: yanhong wang <yanhong.wang@...rfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
<linux-riscv@...ts.infradead.org>, <netdev@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: "David S . Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
Richard Cochran <richardcochran@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Peter Geis <pgwipeout@...il.com>
Subject: Re: [PATCH v2 5/9] dt-bindings: net: motorcomm: add support for
Motorcomm YT8531
On 2022/12/16 19:15, Krzysztof Kozlowski wrote:
> On 16/12/2022 08:06, Yanhong Wang wrote:
>> Add support for Motorcomm Technology YT8531 10/100/1000 Ethernet PHY.
>> The document describe details of clock delay train configuration.
>>
>> Signed-off-by: Yanhong Wang <yanhong.wang@...rfivetech.com>
>
> Missing vendor prefix documentation. I don't think you tested this at
> all with checkpatch and dt_binding_check.
>
>> ---
>> .../bindings/net/motorcomm,yt8531.yaml | 111 ++++++++++++++++++
>> MAINTAINERS | 1 +
>> 2 files changed, 112 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml
>> new file mode 100644
>> index 000000000000..c5b8a09a78bb
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/net/motorcomm,yt8531.yaml
>> @@ -0,0 +1,111 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/net/motorcomm,yt8531.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Motorcomm YT8531 Gigabit Ethernet PHY
>> +
>> +maintainers:
>> + - Yanhong Wang <yanhong.wang@...rfivetech.com>
>> +
>
> Why there is no reference to ethernet-phy.yaml?
>
>> +select:
>> + properties:
>> + $nodename:
>> + pattern: "^ethernet-phy(@[a-f0-9]+)?$"
>
> I don't think that's correct approach. You know affect all phys.
>
>> +
>> + required:
>> + - $nodename
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^ethernet-phy(@[a-f0-9]+)?$"
>
> Just reference ethernet-phy.yaml.
>
>> +
>> + reg:
>> + minimum: 0
>> + maximum: 31
>> + description:
>> + The ID number for the PHY.
>
> Drop duplicated properties.
>
>> +
>> + rxc_dly_en:
>
> No underscores in node names. Missing vendor prefix. Both apply to all
> your other custom properties, unless they are not custom but generic.
>
> Missing ref.
>
>> + description: |
>> + RGMII Receive PHY Clock Delay defined with fixed 2ns.This is used for
>
> After every full stop goes space.
>
>> + PHY that have configurable RX internal delays. If this property set
>> + to 1, then automatically add 2ns delay pad for Receive PHY clock.
>
> Nope, this is wrong. You wrote now boolean property as enum.
>
>> + enum: [0, 1]
>> + default: 0
>> +
>> + rx_delay_sel:
>> + description: |
>> + This is supplement to rxc_dly_en property,and it can
>> + be specified in 150ps(pico seconds) steps. The effective
>> + delay is: 150ps * N.
>
> Nope. Use proper units and drop all this register stuff.
>
>> + minimum: 0
>> + maximum: 15
>> + default: 0
>> +
>> + tx_delay_sel_fe:
>> + description: |
>> + RGMII Transmit PHY Clock Delay defined in pico seconds.This is used for
>> + PHY's that have configurable TX internal delays when speed is 100Mbps
>> + or 10Mbps. It can be specified in 150ps steps, the effective delay
>> + is: 150ps * N.
>
> The binding is in very poor shape. Please look carefully in
> example-schema. All my previous comments apply everywhere.
>
>> + minimum: 0
>> + maximum: 15
>> + default: 15
>> +
>> + tx_delay_sel:
>> + description: |
>> + RGMII Transmit PHY Clock Delay defined in pico seconds.This is used for
>> + PHY's that have configurable TX internal delays when speed is 1000Mbps.
>> + It can be specified in 150ps steps, the effective delay is: 150ps * N.
>> + minimum: 0
>> + maximum: 15
>> + default: 1
>> +
>> + tx_inverted_10:
>> + description: |
>> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
>> + Transmit PHY Clock delay train configuration when speed is 10Mbps.
>> + 0: original 1: inverted
>> + enum: [0, 1]
>> + default: 0
>> +
>> + tx_inverted_100:
>> + description: |
>> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
>> + Transmit PHY Clock delay train configuration when speed is 100Mbps.
>> + 0: original 1: inverted
>> + enum: [0, 1]
>> + default: 0
>> +
>> + tx_inverted_1000:
>> + description: |
>> + Use original or inverted RGMII Transmit PHY Clock to drive the RGMII
>> + Transmit PHY Clock delay train configuration when speed is 1000Mbps.
>> + 0: original 1: inverted
>> + enum: [0, 1]
>> + default: 0
>> +
>> +required:
>> + - reg
>> +
>> +additionalProperties: true
>
> This must be false. After referencing ethernet-phy this should be
> unevaluatedProperties: false.
>
>
Thanks. Parts of this patch exist already, after discussion unanimity was achieved,
i will remove the parts of YT8531 in the next version.
> Best regards,
> Krzysztof
>
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