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Message-ID: <Y6ve2MUrG+/DtjbG@matsya>
Date: Wed, 28 Dec 2022 11:44:48 +0530
From: Vinod Koul <vkoul@...nel.org>
To: Mohan Kumar <mkumard@...dia.com>
Cc: ldewangan@...dia.com, jonathanh@...dia.com,
thierry.reding@...il.com, dmaengine@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
stable-commits@...r.kernel.org
Subject: Re: [PATCH] dmaengine: tegra210-adma: fix global intr clear
On 26-12-22, 12:21, Mohan Kumar wrote:
> The current global interrupt clear programming register offset
> was not correct. Fix the programming with right offset
>
> fixes: 'commit ded1f3db4cd6
> ("dmaengine: tegra210-adma: prepare for supporting newer Tegra chips")'
Ugh, this is not the format for fixes tag, see Documentation/process/5.Posting.rst
>
> Signed-off-by: Mohan Kumar <mkumard@...dia.com>
Why did you CC stable for this email? Again read the process!
> ---
> drivers/dma/tegra210-adma.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/dma/tegra210-adma.c b/drivers/dma/tegra210-adma.c
> index ae39b52012b2..487f8fb411b5 100644
> --- a/drivers/dma/tegra210-adma.c
> +++ b/drivers/dma/tegra210-adma.c
> @@ -221,7 +221,9 @@ static int tegra_adma_init(struct tegra_adma *tdma)
> int ret;
>
> /* Clear any interrupts */
> - tdma_write(tdma, tdma->cdata->global_int_clear, 0x1);
> + tdma_write(tdma,
> + tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear,
> + 0x1);
This looks _very_ ugly, one line should look and read better:
tdma_write(tdma, tdma->cdata->ch_base_offset + tdma->cdata->global_int_clear, 0x1);
We are no longer 80 char limited!
--
~Vinod
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