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Date: Wed, 28 Dec 2022 18:07:19 +0200
From: Oded Gabbay <ogabbay@...nel.org>
To: linux-kernel@...r.kernel.org
Subject: [PATCH 5/9] habanalabs: update f/w files
Update common firmware files with the latest version.
There is no functional change.
Signed-off-by: Oded Gabbay <ogabbay@...nel.org>
---
.../habanalabs/include/common/cpucp_if.h | 33 ++++--
.../habanalabs/include/common/hl_boot_if.h | 101 ++++++++++++++++++
2 files changed, 127 insertions(+), 7 deletions(-)
diff --git a/drivers/accel/habanalabs/include/common/cpucp_if.h b/drivers/accel/habanalabs/include/common/cpucp_if.h
index 0a66b7f85164..d713252a4f13 100644
--- a/drivers/accel/habanalabs/include/common/cpucp_if.h
+++ b/drivers/accel/habanalabs/include/common/cpucp_if.h
@@ -344,6 +344,16 @@ struct hl_eq_engine_arc_intr_data {
__le64 pad[5];
};
+#define ADDR_DEC_ADDRESS_COUNT_MAX 4
+
+/* Data structure specifies details of ADDR_DEC interrupt */
+struct hl_eq_addr_dec_intr_data {
+ struct hl_eq_intr_cause intr_cause;
+ __le64 addr[ADDR_DEC_ADDRESS_COUNT_MAX];
+ __u8 addr_cnt;
+ __u8 pad[7];
+};
+
struct hl_eq_entry {
struct hl_eq_header hdr;
union {
@@ -358,6 +368,7 @@ struct hl_eq_entry {
struct hl_eq_razwi_with_intr_cause razwi_with_intr_cause;
struct hl_eq_hbm_sei_data sei_data; /* Gaudi2 HBM */
struct hl_eq_engine_arc_intr_data arc_data;
+ struct hl_eq_addr_dec_intr_data addr_dec;
__le64 data[7];
};
};
@@ -643,7 +654,7 @@ enum pq_init_status {
* data corruption in case of mismatched driver/FW versions.
* Relevant only to Gaudi.
*
- * * CPUCP_PACKET_GENERIC_PASSTHROUGH -
+ * CPUCP_PACKET_GENERIC_PASSTHROUGH -
* Generic opcode for all firmware info that is only passed to host
* through the LKD, without getting parsed there.
*
@@ -734,6 +745,11 @@ enum cpucp_packet_id {
#define CPUCP_PKT_RES_PLL_OUT3_SHIFT 48
#define CPUCP_PKT_RES_PLL_OUT3_MASK 0xFFFF000000000000ull
+#define CPUCP_PKT_RES_EEPROM_OUT0_SHIFT 0
+#define CPUCP_PKT_RES_EEPROM_OUT0_MASK 0x000000000000FFFFull
+#define CPUCP_PKT_RES_EEPROM_OUT1_SHIFT 16
+#define CPUCP_PKT_RES_EEPROM_OUT1_MASK 0x0000000000FF0000ull
+
#define CPUCP_PKT_VAL_PFC_IN1_SHIFT 0
#define CPUCP_PKT_VAL_PFC_IN1_MASK 0x0000000000000001ull
#define CPUCP_PKT_VAL_PFC_IN2_SHIFT 1
@@ -893,7 +909,9 @@ enum cpucp_in_attributes {
cpucp_in_max,
cpucp_in_lowest = 6,
cpucp_in_highest = 7,
- cpucp_in_reset_history
+ cpucp_in_reset_history,
+ cpucp_in_intr_alarm_a,
+ cpucp_in_intr_alarm_b,
};
enum cpucp_curr_attributes {
@@ -1333,6 +1351,7 @@ struct cpucp_dev_info_signed {
__u8 certificate[SEC_CERTIFICATE_BUF_SZ];
};
+#define DCORE_MON_REGS_SZ 512
/*
* struct dcore_monitor_regs_data - DCORE monitor regs data.
* the structure follows sync manager block layout. relevant only to Gaudi.
@@ -1343,11 +1362,11 @@ struct cpucp_dev_info_signed {
* @mon_status: array of monitor status.
*/
struct dcore_monitor_regs_data {
- __le32 mon_pay_addrl[512];
- __le32 mon_pay_addrh[512];
- __le32 mon_pay_data[512];
- __le32 mon_arm[512];
- __le32 mon_status[512];
+ __le32 mon_pay_addrl[DCORE_MON_REGS_SZ];
+ __le32 mon_pay_addrh[DCORE_MON_REGS_SZ];
+ __le32 mon_pay_data[DCORE_MON_REGS_SZ];
+ __le32 mon_arm[DCORE_MON_REGS_SZ];
+ __le32 mon_status[DCORE_MON_REGS_SZ];
};
/* contains SM data for each SYNC_MNGR (relevant only to Gaudi) */
diff --git a/drivers/accel/habanalabs/include/common/hl_boot_if.h b/drivers/accel/habanalabs/include/common/hl_boot_if.h
index 370e62d0a96a..2256add057c5 100644
--- a/drivers/accel/habanalabs/include/common/hl_boot_if.h
+++ b/drivers/accel/habanalabs/include/common/hl_boot_if.h
@@ -40,6 +40,19 @@ enum cpu_boot_err {
CPU_BOOT_ERR_LAST = 64 /* we have 2 registers of 32 bits */
};
+/*
+ * Mask for fatal failures
+ * This mask contains all possible fatal failures, and a dynamic code
+ * will clear the non-relevant ones.
+ */
+#define CPU_BOOT_ERR_FATAL_MASK \
+ ((1 << CPU_BOOT_ERR_DRAM_INIT_FAIL) | \
+ (1 << CPU_BOOT_ERR_PLL_FAIL) | \
+ (1 << CPU_BOOT_ERR_DEVICE_UNUSABLE_FAIL) | \
+ (1 << CPU_BOOT_ERR_BINNING_FAIL) | \
+ (1 << CPU_BOOT_ERR_DRAM_SKIPPED) | \
+ (1 << CPU_BOOT_ERR_EEPROM_FAIL))
+
/*
* CPU error bits in BOOT_ERROR registers
*
@@ -731,4 +744,92 @@ struct comms_status {
};
};
+/**
+ * HL_MODULES_MAX_NUM is determined by the size of modules_mask in struct
+ * hl_component_versions
+ */
+enum hl_modules {
+ HL_MODULES_BOOT_INFO = 0,
+ HL_MODULES_EEPROM,
+ HL_MODULES_FDT,
+ HL_MODULES_I2C,
+ HL_MODULES_LZ4,
+ HL_MODULES_MBEDTLS,
+ HL_MODULES_MAX_NUM = 16
+};
+
+/**
+ * HL_COMPONENTS_MAX_NUM is determined by the size of components_mask in
+ * struct cpucp_versions
+ */
+enum hl_components {
+ HL_COMPONENTS_PID = 0,
+ HL_COMPONENTS_MGMT,
+ HL_COMPONENTS_PREBOOT,
+ HL_COMPONENTS_PPBOOT,
+ HL_COMPONENTS_ARMCP,
+ HL_COMPONENTS_CPLD,
+ HL_COMPONENTS_UBOOT,
+ HL_COMPONENTS_MAX_NUM = 16
+};
+
+/**
+ * struct hl_component_versions - versions associated with hl component.
+ * @struct_size: size of all the struct (including dynamic size of modules).
+ * @modules_offset: offset of the modules field in this struct.
+ * @component: version of the component itself.
+ * @fw_os: Firmware OS Version.
+ * @modules_mask: i'th bit (from LSB) is a flag - on if module i in enum
+ * hl_modules is used.
+ * @modules_counter: number of set bits in modules_mask.
+ * @reserved: reserved for future use.
+ * @modules: versions of the component's modules. Elborated explanation in
+ * struct cpucp_versions.
+ */
+struct hl_component_versions {
+ __le16 struct_size;
+ __le16 modules_offset;
+ __u8 component[VERSION_MAX_LEN];
+ __u8 fw_os[VERSION_MAX_LEN];
+ __le16 modules_mask;
+ __u8 modules_counter;
+ __u8 reserved[1];
+ __u8 modules[][VERSION_MAX_LEN];
+};
+
+/**
+ * struct hl_fw_versions - all versions (fuse, cpucp's components with their
+ * modules)
+ * @struct_size: size of all the struct (including dynamic size of components).
+ * @components_offset: offset of the components field in this struct.
+ * @fuse: silicon production FUSE information.
+ * @components_mask: i'th bit (from LSB) is a flag - on if component i in enum
+ * hl_components is used.
+ * @components_counter: number of set bits in components_mask.
+ * @reserved: reserved for future use.
+ * @components: versions of hl components. Index i corresponds to the i'th bit
+ * that is *on* in components_mask. For example, if
+ * components_mask=0b101, then *components represents arcpid and
+ * *(hl_component_versions*)((char*)components + 1') represents
+ * preboot, where 1' = components[0].struct_size.
+ */
+struct hl_fw_versions {
+ __le16 struct_size;
+ __le16 components_offset;
+ __u8 fuse[VERSION_MAX_LEN];
+ __le16 components_mask;
+ __u8 components_counter;
+ __u8 reserved[1];
+ struct hl_component_versions components[];
+};
+
+/* Max size of struct hl_component_versions */
+#define HL_COMPONENT_VERSIONS_MAX_SIZE \
+ (sizeof(struct hl_component_versions) + HL_MODULES_MAX_NUM * \
+ VERSION_MAX_LEN)
+
+/* Max size of struct hl_fw_versions */
+#define HL_FW_VERSIONS_MAX_SIZE (sizeof(struct hl_fw_versions) + \
+ HL_COMPONENTS_MAX_NUM * HL_COMPONENT_VERSIONS_MAX_SIZE)
+
#endif /* HL_BOOT_IF_H */
--
2.34.1
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