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Message-Id: <20221229221031.775463-1-robdclark@gmail.com>
Date:   Thu, 29 Dec 2022 14:10:27 -0800
From:   Rob Clark <robdclark@...il.com>
To:     dri-devel@...ts.freedesktop.org
Cc:     freedreno@...ts.freedesktop.org,
        Akhil P Oommen <quic_akhilpo@...cinc.com>,
        Rob Clark <robdclark@...omium.org>,
        Rob Clark <robdclark@...il.com>,
        Abhinav Kumar <quic_abhinavk@...cinc.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        Sean Paul <sean@...rly.run>, David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        linux-arm-msm@...r.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU),
        linux-kernel@...r.kernel.org (open list)
Subject: [RFC] drm/msm/a6xx: Fix devcore register range bugs

From: Rob Clark <robdclark@...omium.org>

RB_MRT_FLAG_BUFFER is 0x8903->0xa91a inclusive.. don't split it (with a
hole) in the ps_cluster_rac and don't accidentially re-dump part of the
range in ps_cluster_rbp.

Signed-off-by: Rob Clark <robdclark@...omium.org>
---
I'm not 100% sure about this, because the RB_RB_SUB_BLOCK_SEL_CNTL_CD
stuff makes me think the registers dumped are not what the offsets
imply.  But if this is the case, the devcore doesn't capture enough
information to decode these regs properly in the first place!  Either
way there is *something* wrong.

I noticed this because these result in the crashdec tool encountering
only _LO or _HI components of 64b regs that it expects to come in
pairs of 32b dwords.

 drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
index 2fb58b7098e4..a03891d844a5 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
@@ -18,12 +18,12 @@ static const u32 a6xx_gras_cluster[] = {
 static const u32 a6xx_ps_cluster_rac[] = {
 	0x8800, 0x8806, 0x8809, 0x8811, 0x8818, 0x881e, 0x8820, 0x8865,
 	0x8870, 0x8879, 0x8880, 0x8889, 0x8890, 0x8891, 0x8898, 0x8898,
-	0x88c0, 0x88c1, 0x88d0, 0x88e3, 0x8900, 0x890c, 0x890f, 0x891a,
+	0x88c0, 0x88c1, 0x88d0, 0x88e3, 0x8900, 0x891a,
 	0x8c00, 0x8c01, 0x8c08, 0x8c10, 0x8c17, 0x8c1f, 0x8c26, 0x8c33,
 };
 
 static const u32 a6xx_ps_cluster_rbp[] = {
-	0x88f0, 0x88f3, 0x890d, 0x890e, 0x8927, 0x8928, 0x8bf0, 0x8bf1,
+	0x88f0, 0x88f3, 0x8927, 0x8928, 0x8bf0, 0x8bf1,
 	0x8c02, 0x8c07, 0x8c11, 0x8c16, 0x8c20, 0x8c25,
 };
 
-- 
2.38.1

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