linux-kernel - Re: [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top

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Message-ID: <CAGXv+5Hp3MFjLcP5z0t6QnYHN3VvVg_Og_HhvWNxm5o1q20B=g@mail.gmail.com>
Date:   Fri, 30 Dec 2022 16:09:59 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Miles Chen <miles.chen@...iatek.com>
Cc:     angelogioacchino.delregno@...labora.com,
        chun-jie.chen@...iatek.com, daniel@...rotopia.org,
        devicetree@...r.kernel.org, fparent@...libre.com,
        ikjn@...omium.org, johnson.wang@...iatek.com,
        jose.exposito89@...il.com, kernel@...labora.com,
        krzysztof.kozlowski+dt@...aro.org,
        linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
        matthias.bgg@...il.com, msp@...libre.com, mturquette@...libre.com,
        nfraprado@...labora.com, pablo.sun@...iatek.com,
        rex-bc.chen@...iatek.com, robh+dt@...nel.org, ryder.lee@...nel.org,
        sam.shih@...iatek.com, sboyd@...nel.org, weiyi.lu@...iatek.com,
        y.oudjana@...tonmail.com, yangyingliang@...wei.com
Subject: Re: [PATCH v2 15/23] clk: mediatek: mt8192: Join top_adj_divs and top_muxes

On Wed, Dec 28, 2022 at 4:31 PM Miles Chen <miles.chen@...iatek.com> wrote:
>
> Hi,
>
> > These two are both mtk_composite arrays, one dependent on another, but
> > that's something that the clock framework is supposed to sort out and
> > anyway registering them separately isn't going to ease the framework's
> > job in checking dependencies.
> >
> > Put the contents of top_adj_divs in top_muxes to join them together
> > and register them in one shot.
> >
>
> In mt8192, we can join top_adj_divs and top_muxes:
>
> mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base, &mt8192_clk_lock,
>                 top_clk_data);
> mtk_clk_register_composites(top_adj_divs, ARRAY_SIZE(top_adj_divs), base, &mt8192_clk_lock,
>                 top_clk_data);
>
> However, there are other top_adj_divs[] and top_muxes[] in different types so
> we cannot join them.
>
> For example:
> in drivers/clk/mediatek/clk-mt8167.c:mtk_topckgen_init():
>
> mtk_clk_register_composites(top_muxes, ARRAY_SIZE(top_muxes), base,
>                 &mt8167_clk_lock, clk_data);
> mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
>                 base, &mt8167_clk_lock, clk_data);
>
> So we can join top_adj_divs and top_muxes in some platforms, but we
> cannot join top_adj_divs and top_muxes in some other platforms.
>
> I'm afraid that this will confuses people.

I think the confusion comes from the macro names. It's not exactly clear that
DIV_GATE is for composite clocks, while DIV_ADJ is for divider clocks.
Doubly so for the mux related types.

Either way, using the wrong macro or the wrong type will cause the compiler
to complain, so I think it's something we can live with. If it's still not
working out, maybe we should rethink the naming.

ChenYu