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Message-ID: <CAGXv+5H=eq0WRc=vvjD-xEKuc1tkM_t4GCHVwe8EZzSJPdEDOQ@mail.gmail.com>
Date:   Fri, 30 Dec 2022 13:19:21 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     mturquette@...libre.com, sboyd@...nel.org, matthias.bgg@...il.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        johnson.wang@...iatek.com, miles.chen@...iatek.com,
        fparent@...libre.com, chun-jie.chen@...iatek.com,
        sam.shih@...iatek.com, y.oudjana@...tonmail.com,
        nfraprado@...labora.com, rex-bc.chen@...iatek.com,
        ryder.lee@...nel.org, daniel@...rotopia.org,
        jose.exposito89@...il.com, yangyingliang@...wei.com,
        pablo.sun@...iatek.com, msp@...libre.com, weiyi.lu@...iatek.com,
        ikjn@...omium.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        kernel@...labora.com
Subject: Re: [PATCH v2 07/23] clk: mediatek: clk-mtk: Add dummy clock ops

On Fri, Dec 23, 2022 at 5:43 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> In order to migrate some (few) old clock drivers to the common
> mtk_clk_simple_probe() function, add dummy clock ops to be able
> to insert a dummy clock with ID 0 at the beginning of the list.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---
>  drivers/clk/mediatek/clk-mtk.c | 15 +++++++++++++++
>  drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
>  2 files changed, 34 insertions(+)
>
> diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
> index a1ab34305b95..d05364e17e95 100644
> --- a/drivers/clk/mediatek/clk-mtk.c
> +++ b/drivers/clk/mediatek/clk-mtk.c
> @@ -18,6 +18,21 @@
>  #include "clk-mtk.h"
>  #include "clk-gate.h"
>
> +const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };

You could probably just use an empty { }, since the contents don't matter.
It would make any possible future changes to |struct mtk_gate_regs| touch
one less place.

Otherwise,

Reviewed-by: Chen-Yu Tsai <wenst@...omium.org>

> +
> +static int mtk_clk_dummy_enable(struct clk_hw *hw)
> +{
> +       return 0;
> +}
> +
> +static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
> +
> +const struct clk_ops mtk_clk_dummy_ops = {
> +       .enable         = mtk_clk_dummy_enable,
> +       .disable        = mtk_clk_dummy_disable,
> +};
> +EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
> +
>  static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
>                               unsigned int clk_num)
>  {
> diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
> index 15122504c02d..dd43235285db 100644
> --- a/drivers/clk/mediatek/clk-mtk.h
> +++ b/drivers/clk/mediatek/clk-mtk.h
> @@ -22,6 +22,25 @@
>
>  struct platform_device;
>
> +/*
> + * We need the clock IDs to start from zero but to maintain devicetree
> + * backwards compatibility we can't change bindings to start from zero.
> + * Only a few platforms are affected, so we solve issues given by the
> + * commonized MTK clocks probe function(s) by adding a dummy clock at
> + * the beginning where needed.
> + */
> +#define CLK_DUMMY              0
> +
> +extern const struct clk_ops mtk_clk_dummy_ops;
> +extern const struct mtk_gate_regs cg_regs_dummy;
> +
> +#define GATE_DUMMY(_id, _name) {                               \
> +               .id = _id,                                      \
> +               .name = _name,                                  \
> +               .regs = &cg_regs_dummy,                         \
> +               .ops = &mtk_clk_dummy_ops,                      \
> +       }
> +
>  struct mtk_fixed_clk {
>         int id;
>         const char *name;
> --
> 2.39.0
>

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