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Message-ID: <1a0c8664-73d1-a963-2215-b3967e1475d3@linaro.org> Date: Sun, 1 Jan 2023 16:38:18 +0100 From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> To: Samuel Holland <samuel@...lland.org>, Chen-Yu Tsai <wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org> Cc: Albert Ou <aou@...s.berkeley.edu>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Palmer Dabbelt <palmer@...belt.com>, Paul Walmsley <paul.walmsley@...ive.com>, Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org, linux-sunxi@...ts.linux.dev, Andre Przywara <andre.przywara@....com> Subject: Re: [PATCH v2 5/6] dt-bindings: clock: Add D1 CAN bus gates and resets On 01/01/2023 00:14, Samuel Holland wrote: > The D1 CCU contains gates and resets for two CAN buses. While the CAN > bus controllers are only documented for the T113 SoC, the CCU is the > same across all SoC variants. > > Reviewed-by: Andre Przywara <andre.przywara@....com> > Signed-off-by: Samuel Holland <samuel@...lland.org> > --- > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> Best regards, Krzysztof
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