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Message-ID: <E376F3F1-CA88-47B3-B3D1-EEF0B283D25D@live.com>
Date: Mon, 2 Jan 2023 14:46:51 +0000
From: Aditya Garg <gargaditya08@...e.com>
To: Hector Martin <marcan@...can.st>,
"aspriel@...il.com" <aspriel@...il.com>,
"hante.meuleman@...adcom.com" <hante.meuleman@...adcom.com>,
"kvalo@...nel.org" <kvalo@...nel.org>,
"davem@...emloft.net" <davem@...emloft.net>,
"edumazet@...gle.com" <edumazet@...gle.com>,
"kuba@...nel.org" <kuba@...nel.org>,
"pabeni@...hat.com" <pabeni@...hat.com>,
"lina@...hilina.net" <lina@...hilina.net>,
"franky.lin@...adcom.com" <franky.lin@...adcom.com>,
Arend van Spriel <arend.vanspriel@...adcom.com>
CC: Orlando Chamberlain <redecorating@...tonmail.com>,
"brcm80211-dev-list@...adcom.com" <brcm80211-dev-list@...adcom.com>,
"brcm80211-dev-list.pdl@...adcom.com"
<brcm80211-dev-list.pdl@...adcom.com>,
"linux-wireless@...r.kernel.org" <linux-wireless@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
Asahi Linux <asahi@...ts.linux.dev>
Subject: [PATCH v2 1/2] brcmfmac: Use separate struct to declare firmware
names for Apple OTP chips
From: Aditya Garg <gargaditya08@...e.com>
Commit 'dce45ded7619' added support for 89459 chip pcie device. It uses the
BRCM4355 chip which is also found in Apple hardware. However this commit
causes conflicts in the firmware naming between Apple hardware, which
supports OTP and other non-Apple hardwares. So, this patch makes these
Apple chips use their own firmware table so as to avoid possible conflicts
like these in the future.
Signed-off-by: Aditya Garg <gargaditya08@...e.com>
---
.../broadcom/brcm80211/brcmfmac/pcie.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
index ae57a9a3a..ad7a780cd 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
@@ -92,10 +92,13 @@ static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
BRCMF_FW_ENTRY(BRCM_CC_43664_CHIP_ID, 0xFFFFFFF0, 4366C),
BRCMF_FW_ENTRY(BRCM_CC_43666_CHIP_ID, 0xFFFFFFF0, 4366C),
BRCMF_FW_ENTRY(BRCM_CC_4371_CHIP_ID, 0xFFFFFFFF, 4371),
- BRCMF_FW_ENTRY(BRCM_CC_4378_CHIP_ID, 0xFFFFFFFF, 4378B1), /* revision ID 3 */
BRCMF_FW_ENTRY(CY_CC_89459_CHIP_ID, 0xFFFFFFFF, 4355),
};
+static const struct brcmf_firmware_mapping brcmf_pcie_otp_fwnames[] = {
+ BRCMF_FW_ENTRY(BRCM_CC_4378_CHIP_ID, 0xFFFFFFFF, 4378B1), /* revision ID 3 */
+};
+
#define BRCMF_PCIE_FW_UP_TIMEOUT 5000 /* msec */
#define BRCMF_PCIE_REG_MAP_SIZE (32 * 1024)
@@ -2165,10 +2168,16 @@ brcmf_pcie_prepare_fw_request(struct brcmf_pciedev_info *devinfo)
{ ".clm_blob", devinfo->clm_name },
};
- fwreq = brcmf_fw_alloc_request(devinfo->ci->chip, devinfo->ci->chiprev,
- brcmf_pcie_fwnames,
- ARRAY_SIZE(brcmf_pcie_fwnames),
- fwnames, ARRAY_SIZE(fwnames));
+ if (devinfo->otp.valid)
+ fwreq = brcmf_fw_alloc_request(devinfo->ci->chip, devinfo->ci->chiprev,
+ brcmf_pcie_otp_fwnames,
+ ARRAY_SIZE(brcmf_pcie_otp_fwnames),
+ fwnames, ARRAY_SIZE(fwnames));
+ else
+ fwreq = brcmf_fw_alloc_request(devinfo->ci->chip, devinfo->ci->chiprev,
+ brcmf_pcie_fwnames,
+ ARRAY_SIZE(brcmf_pcie_fwnames),
+ fwnames, ARRAY_SIZE(fwnames));
if (!fwreq)
return NULL;
--
2.34.1
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