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Message-ID: <aca68dc46c241447e19180e7d2e1b8f9b6b22032.1672771664.git.quic_asutoshd@quicinc.com>
Date: Tue, 3 Jan 2023 11:09:33 -0800
From: Asutosh Das <quic_asutoshd@...cinc.com>
To: <quic_cang@...cinc.com>, <martin.petersen@...cle.com>,
<linux-scsi@...r.kernel.org>
CC: <quic_nguyenb@...cinc.com>, <quic_xiaosenh@...cinc.com>,
<stanley.chu@...iatek.com>, <adrian.hunter@...el.com>,
<bvanassche@....org>, <avri.altman@....com>, <mani@...nel.org>,
<beanhuo@...ron.com>, Asutosh Das <quic_asutoshd@...cinc.com>,
<linux-arm-msm@...r.kernel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
"James E.J. Bottomley" <jejb@...ux.ibm.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Arthur Simchaev <Arthur.Simchaev@....com>,
Jinyoung Choi <j-young.choi@...sung.com>,
"Keoseong Park" <keosung.park@...sung.com>,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
open list <linux-kernel@...r.kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-arm-kernel@...ts.infradead.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>
Subject: [PATCH v12 14/15] ufs: core: mcq: Add completion support in poll
Complete cqe requests in poll. Assumption is that
several poll completion may happen in different CPUs
for the same completion queue. Hence a spin lock
protection is added.
Co-developed-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Asutosh Das <quic_asutoshd@...cinc.com>
Reviewed-by: Bart Van Assche <bvanassche@....org>
Reviewed-by: Manivannan Sadhasivam <mani@...nel.org>
Reviewed-by: Stanley Chu <stanley.chu@...iatek.com>
---
drivers/ufs/core/ufs-mcq.c | 13 +++++++++++++
drivers/ufs/core/ufshcd-priv.h | 2 ++
drivers/ufs/core/ufshcd.c | 7 +++++++
include/ufs/ufshcd.h | 2 ++
4 files changed, 24 insertions(+)
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c
index cd10d59..e710d19 100644
--- a/drivers/ufs/core/ufs-mcq.c
+++ b/drivers/ufs/core/ufs-mcq.c
@@ -294,6 +294,18 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
return completed_reqs;
}
+unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq)
+{
+ unsigned long completed_reqs;
+
+ spin_lock(&hwq->cq_lock);
+ completed_reqs = ufshcd_mcq_poll_cqe_nolock(hba, hwq);
+ spin_unlock(&hwq->cq_lock);
+
+ return completed_reqs;
+}
+
void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba)
{
struct ufs_hw_queue *hwq;
@@ -390,6 +402,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba)
hwq = &hba->uhq[i];
hwq->max_entries = hba->nutrs;
spin_lock_init(&hwq->sq_lock);
+ spin_lock_init(&hwq->cq_lock);
}
/* The very first HW queue serves device commands */
diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h
index 1691fc0..b1c5a15 100644
--- a/drivers/ufs/core/ufshcd-priv.h
+++ b/drivers/ufs/core/ufshcd-priv.h
@@ -75,6 +75,8 @@ unsigned long ufshcd_mcq_poll_cqe_nolock(struct ufs_hba *hba,
struct ufs_hw_queue *hwq);
struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba,
struct request *req);
+unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba,
+ struct ufs_hw_queue *hwq);
#define UFSHCD_MCQ_IO_QUEUE_OFFSET 1
#define SD_ASCII_STD true
diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index 2635570..4d31131 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -5461,6 +5461,13 @@ static int ufshcd_poll(struct Scsi_Host *shost, unsigned int queue_num)
struct ufs_hba *hba = shost_priv(shost);
unsigned long completed_reqs, flags;
u32 tr_doorbell;
+ struct ufs_hw_queue *hwq;
+
+ if (is_mcq_enabled(hba)) {
+ hwq = &hba->uhq[queue_num + UFSHCD_MCQ_IO_QUEUE_OFFSET];
+
+ return ufshcd_mcq_poll_cqe_lock(hba, hwq);
+ }
spin_lock_irqsave(&hba->outstanding_lock, flags);
tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 1c4d5f8..2f36351 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -1076,6 +1076,7 @@ struct ufs_hba {
* @sq_lock: serialize submission queue access
* @cq_tail_slot: current slot to which CQ tail pointer is pointing
* @cq_head_slot: current slot to which CQ head pointer is pointing
+ * @cq_lock: Synchronize between multiple polling instances
*/
struct ufs_hw_queue {
void __iomem *mcq_sq_head;
@@ -1093,6 +1094,7 @@ struct ufs_hw_queue {
spinlock_t sq_lock;
u32 cq_tail_slot;
u32 cq_head_slot;
+ spinlock_t cq_lock;
};
static inline bool is_mcq_enabled(struct ufs_hba *hba)
--
2.7.4
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