linux-kernel - [tip: perf/urgent] perf/x86/rapl: Treat Tigerlake like Icelake

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Date:   Tue, 03 Jan 2023 18:00:40 -0000
From:   "tip-bot2 for Chris Wilson" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Chris Wilson <chris@...is-wilson.co.uk>,
        Rodrigo Vivi <rodrigo.vivi@...el.com>,
        Ingo Molnar <mingo@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Stephane Eranian <eranian@...gle.com>,
        Zhang Rui <rui.zhang@...el.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: perf/urgent] perf/x86/rapl: Treat Tigerlake like Icelake

The following commit has been merged into the perf/urgent branch of tip:

Commit-ID:     c07311b5509f6035f1dd828db3e90ff4859cf3b9
Gitweb:        https://git.kernel.org/tip/c07311b5509f6035f1dd828db3e90ff4859cf3b9
Author:        Chris Wilson <chris@...is-wilson.co.uk>
AuthorDate:    Wed, 28 Dec 2022 06:34:54 -05:00
Committer:     Ingo Molnar <mingo@...nel.org>
CommitterDate: Tue, 03 Jan 2023 18:55:35 +01:00

perf/x86/rapl: Treat Tigerlake like Icelake

Since Tigerlake seems to have inherited its cstates and other RAPL power
caps from Icelake, assume it also follows Icelake for its RAPL events.

Signed-off-by: Chris Wilson <chris@...is-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@...el.com>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Zhang Rui <rui.zhang@...el.com>
Link: https://lore.kernel.org/r/20221228113454.1199118-1-rodrigo.vivi@intel.com
---
 arch/x86/events/rapl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c
index a829492..ae5779e 100644
--- a/arch/x86/events/rapl.c
+++ b/arch/x86/events/rapl.c
@@ -800,6 +800,8 @@ static const struct x86_cpu_id rapl_model_match[] __initconst = {
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X,		&model_hsx),
 	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE,		&model_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L,		&model_skl),
+	X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,		&model_skl),
 	X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,		&model_skl),