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Message-Id: <20230104221024.23524-1-craterrender@gmail.com>
Date:   Wed,  4 Jan 2023 22:10:24 +0000
From:   Ben Carter <craterrender@...il.com>
To:     Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
        Cezary Rojewski <cezary.rojewski@...el.com>,
        Amadeusz Sławiński 
        <amadeuszx.slawinski@...ux.intel.com>,
        Mark Brown <broonie@...nel.org>,
        Divya Prakash <divya1.prakash@...el.com>,
        Ben Carter <craterrender@...il.com>
Cc:     alsa-devel@...a-project.org, linux-kernel@...r.kernel.org
Subject: [PATCH] sound: hda: increase timeouts to stop crash on resume with ALC3204 and others

Upon waking after system suspend, ALSA often crashed with:
  snd_hda_intel 0000:00:1f.3: CORB reset timeout#2, CORBRP = 65535
  snd_hda_codec_hdmi hdaudioC1D2: Unable to sync register 0x2f8100. -5
  snd_hda_codec_realtek hdaudioC1D0: Unable to sync register 0x2b8000. -5
A temporary fix was established by reloading snd_hda_intel, but increasing
the rather strict timeout of 1ms to 100ms has remedied the issue on my
device. Although this is a much larger delay, most hardware took less than
1ms anyway and it's preferable to the whole audio system crashing.

Signed-off-by: Ben Carter <craterrender@...il.com>
---
 sound/hda/hdac_controller.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/sound/hda/hdac_controller.c b/sound/hda/hdac_controller.c
index 3c7af6558249..1ab573248452 100644
--- a/sound/hda/hdac_controller.c
+++ b/sound/hda/hdac_controller.c
@@ -16,7 +16,7 @@ static void azx_clear_corbrp(struct hdac_bus *bus)
 {
 	int timeout;
 
-	for (timeout = 1000; timeout > 0; timeout--) {
+	for (timeout = 100000; timeout > 0; timeout--) {
 		if (snd_hdac_chip_readw(bus, CORBRP) & AZX_CORBRP_RST)
 			break;
 		udelay(1);
@@ -26,7 +26,7 @@ static void azx_clear_corbrp(struct hdac_bus *bus)
 			snd_hdac_chip_readw(bus, CORBRP));
 
 	snd_hdac_chip_writew(bus, CORBRP, 0);
-	for (timeout = 1000; timeout > 0; timeout--) {
+	for (timeout = 100000; timeout > 0; timeout--) {
 		if (snd_hdac_chip_readw(bus, CORBRP) == 0)
 			break;
 		udelay(1);
-- 
2.39.0

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