linux-kernel - Re: [PATCH] clocksource/drivers/riscv: Increase the clock source rating

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Message-ID: <a9dba647-b307-e60f-c31a-3ef7f949d23e@linaro.org>
Date:   Wed, 4 Jan 2023 23:29:06 +0100
From:   Daniel Lezcano <daniel.lezcano@...aro.org>
To:     Samuel Holland <samuel@...lland.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Thomas Gleixner <tglx@...utronix.de>
Cc:     Prabhakar Lad <prabhakar.csengg@...il.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH] clocksource/drivers/riscv: Increase the clock source
 rating

On 28/12/2022 01:44, Samuel Holland wrote:
> RISC-V provides an architectural clock source via the time CSR. This
> clock source exposes a 64-bit counter synchronized across all CPUs.
> Because it is accessed using a CSR, it is much more efficient to read
> than MMIO clock sources. For example, on the Allwinner D1, reading the
> sun4i timer in a loop takes 131 cycles/iteration, while reading the
> RISC-V time CSR takes only 5 cycles/iteration.
> 
> Adjust the RISC-V clock source rating so it is preferred over the
> various platform-specific MMIO clock sources.
> 
> Signed-off-by: Samuel Holland <samuel@...lland.org>
> ---
Applied, thanks

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