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Message-ID: <20230104012215.1222263-1-sdonthineni@nvidia.com>
Date: Tue, 3 Jan 2023 19:22:15 -0600
From: Shanker Donthineni <sdonthineni@...dia.com>
To: Catalin Marinas <catalin.marinas@....com>,
Marc Zyngier <maz@...nel.org>, Will Deacon <will@...nel.org>,
James Morse <james.morse@....com>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Shanker Donthineni <sdonthineni@...dia.com>
Subject: [PATCH] arm64: gic: increase the number of IRQ descriptors
The default value of NR_IRQS is not sufficient to support GICv4.1
features and ~64K LPIs. This parameter would be too small for certain
server platforms where it has many IO devices and is capable of
direct injection of vSGI and vLPI features.
Currently, maximum of 64 + 8192 (IRQ_BITMAP_BITS) IRQ descriptors
are allowed. The vCPU creation fails after reaching count ~400 with
kvm-arm.vgic_v4_enable=1.
This patch increases NR_IRQS to 1^19 to cover 64K LPIs and 262144
vSGIs (16K vPEs x 16).
Signed-off-by: Shanker Donthineni <sdonthineni@...dia.com>
---
arch/arm64/include/asm/irq.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/irq.h b/arch/arm64/include/asm/irq.h
index 168d710a7b70..741e0e9148ed 100644
--- a/arch/arm64/include/asm/irq.h
+++ b/arch/arm64/include/asm/irq.h
@@ -4,6 +4,10 @@
#ifndef __ASSEMBLER__
+#if defined(CONFIG_ARM_GIC_V3_ITS)
+#define NR_IRQS (1 << 19)
+#endif
+
#include <asm-generic/irq.h>
#include <linux/irqchip/arm-gic-common.h>
--
2.25.1
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