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Message-Id: <20230105201242.189195-2-fabrizio.castro.jz@renesas.com>
Date: Thu, 5 Jan 2023 20:12:41 +0000
From: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
To: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Sebastian Reichel <sre@...nel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>
Cc: Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lee Jones <lee@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
linux-renesas-soc@...r.kernel.org,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Jacopo Mondi <jacopo@...ndi.org>, Rob Herring <robh@...nel.org>
Subject: [PATCH v4 1/2] dt-bindings: mfd: Add RZ/V2M PWC
The Renesas RZ/V2M External Power Sequence Controller (PWC)
IP is a multi-function device, and it's capable of:
* external power supply on/off sequence generation
* on/off signal generation for the LPDDR4 core power supply (LPVDD)
* key input signals processing
* general-purpose output pins
Add the corresponding dt-bindings.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes.
v2->v3: No change.
v3->v4: Moved file under Documentation/devicetree/bindings/soc/renesas,
and changed $id accordingly. Rob, I have kept your Reviewed-by
tag assuming you are still happy, please do jump in if you think
that's not appropriate anymore.
.../soc/renesas/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml
diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml
new file mode 100644
index 000000000000..12df33f58484
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Renesas RZ/V2M External Power Sequence Controller (PWC)
+
+description: |+
+ The PWC IP found in the RZ/V2M family of chips comes with the below
+ capabilities
+ - external power supply on/off sequence generation
+ - on/off signal generation for the LPDDR4 core power supply (LPVDD)
+ - key input signals processing
+ - general-purpose output pins
+
+maintainers:
+ - Fabrizio Castro <fabrizio.castro.jz@...esas.com>
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - renesas,r9a09g011-pwc # RZ/V2M
+ - renesas,r9a09g055-pwc # RZ/V2MA
+ - const: renesas,rzv2m-pwc
+
+ reg:
+ maxItems: 1
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ renesas,rzv2m-pwc-power:
+ description: The PWC is used to control the system power supplies.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - gpio-controller
+ - '#gpio-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ pwc: pwc@...00000 {
+ compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
+ reg = <0xa3700000 0x800>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ renesas,rzv2m-pwc-power;
+ };
--
2.34.1
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