linux-kernel - Re: [PATCH] arm64: dts: zynqmp: Add mode-pin GPIO controller DT node

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Message-ID: <8be5b2ed-9d0c-e628-fb34-5241c2492794@amd.com>
Date:   Thu, 5 Jan 2023 09:51:43 +0100
From:   Michal Simek <michal.simek@....com>
To:     <linux-kernel@...r.kernel.org>, <monstr@...str.eu>,
        <michal.simek@...inx.com>, <git@...inx.com>
CC:     Piyush Mehta <piyush.mehta@...inx.com>,
        David Heidelberg <david@...t.cz>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Michael Tretter <m.tretter@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        Robert Hancock <robert.hancock@...ian.com>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH] arm64: dts: zynqmp: Add mode-pin GPIO controller DT node



On 12/9/22 14:54, Michal Simek wrote:
> From: Piyush Mehta <piyush.mehta@...inx.com>
> 
> Add mode-pin GPIO controller DT node in zynqmp.dtsi and wire it to usb0
> controller. All Xilinx evaluation boards are using modepin gpio for ULPI
> reset that's why wire it directly in zynqmp instead of c&p the same line to
> every board specific file.
> 
> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@...inx.com>
> Signed-off-by: Michal Simek <michal.simek@....com>
> ---
> 
>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++++++
>   1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 99273cbbc75f..8553299f12eb 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -13,6 +13,7 @@
>    */
>   
>   #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
> +#include <dt-bindings/gpio/gpio.h>
>   #include <dt-bindings/power/xlnx-zynqmp-power.h>
>   #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
>   
> @@ -183,6 +184,12 @@ pinctrl0: pinctrl {
>   				compatible = "xlnx,zynqmp-pinctrl";
>   				status = "disabled";
>   			};
> +
> +			modepin_gpio: gpio {
> +				compatible = "xlnx,zynqmp-gpio-modepin";
> +				gpio-controller;
> +				#gpio-cells = <2>;
> +			};
>   		};
>   	};
>   
> @@ -814,6 +821,7 @@ usb0: usb@...d0000 {
>   				 <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>,
>   				 <&zynqmp_reset ZYNQMP_RESET_USB0_APB>;
>   			reset-names = "usb_crst", "usb_hibrst", "usb_apbrst";
> +			reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>;
>   			ranges;
>   
>   			dwc3_0: usb@...00000 {

Applied.
M