lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <d4d132d9-1513-6a4e-981f-aa4bc4ebbcbb@linux.alibaba.com>
Date:   Thu, 5 Jan 2023 18:05:59 +0800
From:   Jing Zhang <renyu.zj@...ux.alibaba.com>
To:     John Garry <john.g.garry@...cle.com>,
        Ian Rogers <irogers@...gle.com>,
        Xing Zhengjun <zhengjun.xing@...ux.intel.com>,
        Will Deacon <will@...nel.org>,
        James Clark <james.clark@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>
Cc:     linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        Andrew Kilroy <andrew.kilroy@....com>,
        Shuai Xue <xueshuai@...ux.alibaba.com>,
        Zhuo Song <zhuo.song@...ux.alibaba.com>
Subject: Re: [PATCH v5 1/6] perf vendor events arm64: Add topdown L1 metrics
 for neoverse-n2



在 2023/1/5 上午1:26, John Garry 写道:
> On 04/01/2023 05:05, Jing Zhang wrote:
>>
>>
>> 在 2023/1/3 下午7:52, John Garry 写道:
>>> On 03/01/2023 11:39, Jing Zhang wrote:
>>>> The formula of topdown L1 on neoverse-n2 is from ARM sbsa7.0 platform
>>>> design document [0], D37-38.
>>>
>>> I think that I mentioned this before - if the these metrics are coming from an sbsa doc, then they are standard. As such, we can make them "arch std events" and put them in a common json such as sbsa.json, so that other cores may reuse.
>>>
>>> You don't strictly have to do do this now, but it would be better.
>>>
>>
>> Hi John,
> 
> Hi Jing,
> 
>>
>> I would really like to do this, but as discussed earlier, slot is different on each architectures.
>> If I do not specify the value of the slot in sbsa.json, then in the json file of n2/v1, I need to
>> overwrite each topdown "MetricExpr". In other words, the metrics placed in the sbsa.json file only
>> reuse "BriefDescription", "MetricGroup" and "ScaleUnit". So I'm not sure if it's acceptable?
> 
> I don't see a lot of value in that really.
> 
> However, for this value of slot, isn't this discoverable from a system register per core? Quoting the sbsa: "The IMPLEMENTATION DEFINED constant SLOTS is discoverable from the system register PMMIR_EL1.SLOTS." Did you consider how this could be used?
> 


This may be a feasible idea. The value of slots comes from the register PMMIR_EL1, which I can read in
/sys/bus/event_source/device/armv8_pmuv3_*/caps/slots. But how do I replace the slots in MetricExpr with the
read slots values? Currently I understand that parameters in metricExpr only support events and constants.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ