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Message-Id: <20230105124744.105950-3-ilpo.jarvinen@linux.intel.com>
Date: Thu, 5 Jan 2023 14:47:43 +0200
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: linux-serial@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Philippe Mathieu-Daudé <philmd@...aro.org>,
linux-kernel@...r.kernel.org
Cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Subject: [PATCH v2 2/3] serial: 8250_rt288x: Name non-standard divisor latch reg
Instead of a literal, add proper name for the non-standard divisor
latch register.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
---
drivers/tty/serial/8250/8250_rt288x.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/8250/8250_rt288x.c b/drivers/tty/serial/8250/8250_rt288x.c
index cb9a86bd3a07..3015afb99722 100644
--- a/drivers/tty/serial/8250/8250_rt288x.c
+++ b/drivers/tty/serial/8250/8250_rt288x.c
@@ -12,6 +12,8 @@
#include "8250.h"
+#define RT288X_DL 0x28
+
#define UART_REG_UNMAPPED -1
/* Au1x00/RT288x UART hardware has a weird register layout */
@@ -60,12 +62,12 @@ static void au_serial_out(struct uart_port *p, int offset, int value)
/* Au1x00 haven't got a standard divisor latch */
static int au_serial_dl_read(struct uart_8250_port *up)
{
- return __raw_readl(up->port.membase + 0x28);
+ return __raw_readl(up->port.membase + RT288X_DL);
}
static void au_serial_dl_write(struct uart_8250_port *up, int value)
{
- __raw_writel(value, up->port.membase + 0x28);
+ __raw_writel(value, up->port.membase + RT288X_DL);
}
int au_platform_setup(struct plat_serial8250_port *p)
--
2.30.2
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