linux-kernel - [PATCH v5 0/2] Driver support for RZ/V2M PWC

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Message-Id: <20230106125816.10600-1-fabrizio.castro.jz@renesas.com>
Date:   Fri,  6 Jan 2023 12:58:14 +0000
From:   Fabrizio Castro <fabrizio.castro.jz@...esas.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Bartosz Golaszewski <brgl@...ev.pl>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Sebastian Reichel <sre@...nel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>
Cc:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
        Lee Jones <lee@...nel.org>, linux-gpio@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        linux-renesas-soc@...r.kernel.org,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        Jacopo Mondi <jacopo@...ndi.org>
Subject: [PATCH v5 0/2] Driver support for RZ/V2M PWC

The PWC IP found in the RZ/V2M family of chips comes with the below
capabilities:
* external power supply on/off sequence generation
* on/off signal generation for the LPDDR4 core power supply (LPVDD)
* key input signals processing
* general-purpose output pins

Version 5 of this series fixes subject line and changelog of the
dt-bindings patch.

Thanks,
Fab

Fabrizio Castro (2):
  dt-bindings: soc: renesas: Add RZ/V2M PWC
  soc: renesas: Add PWC support for RZ/V2M

 .../soc/renesas/renesas,rzv2m-pwc.yaml        |  56 +++++++
 drivers/soc/renesas/Kconfig                   |   4 +
 drivers/soc/renesas/Makefile                  |   1 +
 drivers/soc/renesas/pwc-rzv2m.c               | 141 ++++++++++++++++++
 4 files changed, 202 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml
 create mode 100644 drivers/soc/renesas/pwc-rzv2m.c

-- 
2.34.1