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Message-ID: <CAH+2xPAK__rxbk1mt_7=YW111SBTPtA+1WVAhumC82Vah0ZY8g@mail.gmail.com>
Date:   Sat, 7 Jan 2023 17:57:09 +0100
From:   Bruno Thomsen <bruno.thomsen@...il.com>
To:     Hugo Villeneuve <hugo@...ovil.com>
Cc:     a.zummo@...ertech.it, alexandre.belloni@...tlin.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-rtc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Hugo Villeneuve <hvilleneuve@...onoff.com>
Subject: Re: [PATCH v3 03/14] rtc: pcf2127: adapt for alarm registers at any offset

Den tor. 15. dec. 2022 kl. 16.20 skrev Hugo Villeneuve <hugo@...ovil.com>:
>
> From: Hugo Villeneuve <hvilleneuve@...onoff.com>
>
> This will simplify the implementation of new variants into this driver.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>

I have tested the entire patch series on
imx7d-flex-concentrator.dts[1] using pcf2127,
and have not observed any issues but I don't use the alarm and CLKOUT functions.

Reviewed-by: Bruno Thomsen <bruno.thomsen@...il.com>

[1] https://elixir.bootlin.com/linux/latest/source/arch/arm/boot/dts/imx7d-flex-concentrator.dts

> ---
>  drivers/rtc/rtc-pcf2127.c | 42 ++++++++++++++++++++++-----------------
>  1 file changed, 24 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index fb0caacaabee..db0cb784c0c9 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -56,11 +56,14 @@
>  /* Time and date registers bits */
>  #define PCF2127_BIT_SC_OSF                     BIT(7)
>  /* Alarm registers */
> -#define PCF2127_REG_ALARM_SC           0x0A
> -#define PCF2127_REG_ALARM_MN           0x0B
> -#define PCF2127_REG_ALARM_HR           0x0C
> -#define PCF2127_REG_ALARM_DM           0x0D
> -#define PCF2127_REG_ALARM_DW           0x0E
> +#define PCF2127_REG_ALARM_BASE         0x0A
> +/* Alarm registers offsets (starting from base register) */
> +#define PCF2127_OFFSET_ALARM_SC                0
> +#define PCF2127_OFFSET_ALARM_MN                1
> +#define PCF2127_OFFSET_ALARM_HR                2
> +#define PCF2127_OFFSET_ALARM_DM                3
> +#define PCF2127_OFFSET_ALARM_DW                4
> +/* Alarm bits */
>  #define PCF2127_BIT_ALARM_AE                   BIT(7)
>  /* CLKOUT control register */
>  #define PCF2127_REG_CLKOUT             0x0f
> @@ -110,6 +113,7 @@ struct pcf21xx_config {
>         unsigned int has_nvmem:1;
>         unsigned int has_bit_wd_ctl_cd0:1;
>         u8 regs_td_base; /* Time/data base registers. */
> +       u8 regs_alarm_base; /* Alarm function base registers. */
>  };
>
>  struct pcf2127 {
> @@ -402,18 +406,18 @@ static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
>         if (ret)
>                 return ret;
>
> -       ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
> -                              sizeof(buf));
> +       ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
> +                              buf, sizeof(buf));
>         if (ret)
>                 return ret;
>
>         alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
>         alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;
>
> -       alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
> -       alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
> -       alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
> -       alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
> +       alrm->time.tm_sec = bcd2bin(buf[PCF2127_OFFSET_ALARM_SC] & 0x7F);
> +       alrm->time.tm_min = bcd2bin(buf[PCF2127_OFFSET_ALARM_MN] & 0x7F);
> +       alrm->time.tm_hour = bcd2bin(buf[PCF2127_OFFSET_ALARM_HR] & 0x3F);
> +       alrm->time.tm_mday = bcd2bin(buf[PCF2127_OFFSET_ALARM_DM] & 0x3F);
>
>         return 0;
>  }
> @@ -447,14 +451,14 @@ static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
>         if (ret)
>                 return ret;
>
> -       buf[0] = bin2bcd(alrm->time.tm_sec);
> -       buf[1] = bin2bcd(alrm->time.tm_min);
> -       buf[2] = bin2bcd(alrm->time.tm_hour);
> -       buf[3] = bin2bcd(alrm->time.tm_mday);
> -       buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
> +       buf[PCF2127_OFFSET_ALARM_SC] = bin2bcd(alrm->time.tm_sec);
> +       buf[PCF2127_OFFSET_ALARM_MN] = bin2bcd(alrm->time.tm_min);
> +       buf[PCF2127_OFFSET_ALARM_HR] = bin2bcd(alrm->time.tm_hour);
> +       buf[PCF2127_OFFSET_ALARM_DM] = bin2bcd(alrm->time.tm_mday);
> +       buf[PCF2127_OFFSET_ALARM_DW] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
>
> -       ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
> -                               sizeof(buf));
> +       ret = regmap_bulk_write(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
> +                               buf, sizeof(buf));
>         if (ret)
>                 return ret;
>
> @@ -659,12 +663,14 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
>                 .has_nvmem = 1,
>                 .has_bit_wd_ctl_cd0 = 1,
>                 .regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> +               .regs_alarm_base = PCF2127_REG_ALARM_BASE,
>         },
>         [PCF2129] = {
>                 .max_register = 0x19,
>                 .has_nvmem = 0,
>                 .has_bit_wd_ctl_cd0 = 0,
>                 .regs_td_base = PCF2127_REG_TIME_DATE_BASE,
> +               .regs_alarm_base = PCF2127_REG_ALARM_BASE,
>         },
>  };
>
> --
> 2.30.2
>

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