linux-kernel - Re: [PATCH v1 2/2] dt-bindings: riscv: add a capacity-dmips-mhz cpu property

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Message-ID: <167321454620.325726.1419996484202189237.robh@kernel.org>
Date:   Sun, 8 Jan 2023 15:49:07 -0600
From:   Rob Herring <robh@...nel.org>
To:     Conor Dooley <conor@...nel.org>
Cc:     Alex Shi <alexs@...nel.org>, devicetree@...r.kernel.org,
        Yanteng Si <siyanteng@...ngson.cn>,
        Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
        linux-kernel@...r.kernel.org, Sudeep Holla <sudeep.holla@....com>,
        linux-doc@...r.kernel.org, Jonathan Corbet <corbet@....net>,
        linux-riscv@...ts.infradead.org,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        palmer@...belt.com, Rob Herring <robh+dt@...nel.org>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v1 2/2] dt-bindings: riscv: add a capacity-dmips-mhz cpu
 property


On Wed, 04 Jan 2023 18:05:14 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> Since commit 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.")
> RISC-V has used the generic arch topology code, which provides for
> disparate CPU capacities. We never defined a binding to acquire this
> information from the DT though, so document the one already used by the
> generic arch topology code: "capacity-dmips-mhz".
> 
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
>  Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
>  1 file changed, 6 insertions(+)
> 

Acked-by: Rob Herring <robh@...nel.org>