linux-kernel - RE: [PATCH v2 2/5] ASoC: samsung: i2s: add support for FSD I2S

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Message-ID: <051e01d923df$af7156a0$0e5403e0$@samsung.com>
Date:   Mon, 9 Jan 2023 09:35:58 +0530
From:   "Padmanabhan Rajanbabu" <p.rajanbabu@...sung.com>
To:     "'Mark Brown'" <broonie@...nel.org>
Cc:     <lgirdwood@...il.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <s.nawrocki@...sung.com>,
        <perex@...ex.cz>, <tiwai@...e.com>, <pankaj.dubey@...sung.com>,
        <alim.akhtar@...sung.com>, <rcsekar@...sung.com>,
        <aswani.reddy@...sung.com>, <alsa-devel@...a-project.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-samsung-soc@...r.kernel.org>
Subject: RE: [PATCH v2 2/5] ASoC: samsung: i2s: add support for FSD I2S

> -----Original Message-----
> From: Mark Brown [mailto:broonie@...nel.org]
> Sent: 03 January 2023 11:39 PM
> To: Padmanabhan Rajanbabu <p.rajanbabu@...sung.com>
> Cc: lgirdwood@...il.com; robh+dt@...nel.org;
> krzysztof.kozlowski+dt@...aro.org; s.nawrocki@...sung.com;
> perex@...ex.cz; tiwai@...e.com; pankaj.dubey@...sung.com;
> alim.akhtar@...sung.com; rcsekar@...sung.com;
> aswani.reddy@...sung.com; alsa-devel@...a-project.org;
> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; linux-samsung-
> soc@...r.kernel.org
> Subject: Re: [PATCH v2 2/5] ASoC: samsung: i2s: add support for FSD I2S
> 
> On Tue, Jan 03, 2023 at 10:26:10AM +0530, Padmanabhan Rajanbabu wrote:
> 
> > +void fsd_i2s_fixup_early(struct snd_pcm_substream *substream,
> > +		struct snd_soc_dai *dai)
> > +{
> > +	struct snd_soc_pcm_runtime *rtd =
> asoc_substream_to_rtd(substream);
> > +	struct i2s_dai *i2s = to_info(asoc_rtd_to_cpu(rtd, 0));
> > +	struct i2s_dai *other = get_other_dai(i2s);
> > +
> > +	if (!is_opened(other)) {
> > +		i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK, 192,
> SND_SOC_CLOCK_OUT);
> > +		i2s_set_sysclk(dai, SAMSUNG_I2S_OPCLK, 0,
> MOD_OPCLK_PCLK);
> > +	}
> > +}
> 
> This looks like we're just hard coding to 192kHz?

Not actually. The value 192 being passed is for the RFS divider
based on which the Root clock source is divided to generate bit-clock
and frame-clock in master mode.

But, FSD SoC is utilizing the Exynos7-I2S controller in slave
mode, where bit-clock and frame-clock is sourced by the codec.
Therefore the sampling of data happens with codec clock source and
not based on the clock source from RCLK. However, we still need RFS and
BFS configured to default value for the proper operation of the controller.

The current operation being performed above is to change the Codec
clock direction to "out", so that codec will use this clock source to
generate bit clock and frame clock from its own PLL.

I'll make the changes in the next patch set to pass 0 instead of 192 here,
so that RFS and BFS will be configured to default value in config_setup
function.

Thanks,
Padmanabhan R.