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Message-ID: <Y7xvRKax2wls5+IL@google.com>
Date: Mon, 9 Jan 2023 11:47:16 -0800
From: Benson Leung <bleung@...gle.com>
To: Prashant Malani <pmalani@...omium.org>
Cc: linux-kernel@...r.kernel.org, chrome-platform@...ts.linux.dev,
heikki.krogerus@...ux.intel.com,
Benson Leung <bleung@...omium.org>,
Daisuke Nojiri <dnojiri@...omium.org>,
"Dustin L. Howett" <dustin@...ett.net>,
Evan Green <evgreen@...omium.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Guenter Roeck <groeck@...omium.org>,
"Gustavo A. R. Silva" <gustavoars@...nel.org>,
Lee Jones <lee.jones@...aro.org>, Lee Jones <lee@...nel.org>,
Sebastian Reichel <sebastian.reichel@...labora.com>,
Stephen Boyd <swboyd@...omium.org>,
Tinghan Shen <tinghan.shen@...iatek.com>,
Tzung-Bi Shih <tzungbi@...nel.org>,
Xiang wangx <wangxiang@...rlc.com>
Subject: Re: [PATCH 06/10] platform/chrome: cros_ec_typec: Move structs to
header
On Wed, Dec 28, 2022 at 12:45:09AM +0000, Prashant Malani wrote:
> Move ChromeOS Type-C structs into their own header, so they can be
> referenced by other files which can be added to the same module.
>
> No functional changes introduced by this patch.
>
> Signed-off-by: Prashant Malani <pmalani@...omium.org>
Reviewed-by: Benson Leung <bleung@...omium.org>
> ---
> MAINTAINERS | 2 +-
> drivers/platform/chrome/cros_ec_typec.c | 78 +----------------------
> drivers/platform/chrome/cros_ec_typec.h | 85 +++++++++++++++++++++++++
> 3 files changed, 88 insertions(+), 77 deletions(-)
> create mode 100644 drivers/platform/chrome/cros_ec_typec.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f61eb221415b..8219b646ab50 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -4998,7 +4998,7 @@ CHROMEOS EC USB TYPE-C DRIVER
> M: Prashant Malani <pmalani@...omium.org>
> L: chrome-platform@...ts.linux.dev
> S: Maintained
> -F: drivers/platform/chrome/cros_ec_typec.c
> +F: drivers/platform/chrome/cros_ec_typec.*
> F: drivers/platform/chrome/cros_typec_switch.c
>
> CHROMEOS EC USB PD NOTIFY DRIVER
> diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c
> index 665fa76e2416..a4eff590ca56 100644
> --- a/drivers/platform/chrome/cros_ec_typec.c
> +++ b/drivers/platform/chrome/cros_ec_typec.c
> @@ -7,96 +7,22 @@
> */
>
> #include <linux/acpi.h>
> -#include <linux/list.h>
> #include <linux/module.h>
> #include <linux/of.h>
> #include <linux/platform_data/cros_ec_commands.h>
> -#include <linux/platform_data/cros_ec_proto.h>
> #include <linux/platform_data/cros_usbpd_notify.h>
> #include <linux/platform_device.h>
> -#include <linux/usb/pd.h>
> #include <linux/usb/pd_vdo.h>
> -#include <linux/usb/typec.h>
> -#include <linux/usb/typec_altmode.h>
> #include <linux/usb/typec_dp.h>
> -#include <linux/usb/typec_mux.h>
> -#include <linux/usb/typec_retimer.h>
> #include <linux/usb/typec_tbt.h>
> -#include <linux/usb/role.h>
> +
> +#include "cros_ec_typec.h"
>
> #define DRV_NAME "cros-ec-typec"
>
> #define DP_PORT_VDO (DP_CONF_SET_PIN_ASSIGN(BIT(DP_PIN_ASSIGN_C) | BIT(DP_PIN_ASSIGN_D)) | \
> DP_CAP_DFP_D | DP_CAP_RECEPTACLE)
>
> -/* Supported alt modes. */
> -enum {
> - CROS_EC_ALTMODE_DP = 0,
> - CROS_EC_ALTMODE_TBT,
> - CROS_EC_ALTMODE_MAX,
> -};
> -
> -/* Container for altmode pointer nodes. */
> -struct cros_typec_altmode_node {
> - struct typec_altmode *amode;
> - struct list_head list;
> -};
> -
> -/* Per port data. */
> -struct cros_typec_port {
> - struct typec_port *port;
> - int port_num;
> - /* Initial capabilities for the port. */
> - struct typec_capability caps;
> - struct typec_partner *partner;
> - struct typec_cable *cable;
> - /* SOP' plug. */
> - struct typec_plug *plug;
> - /* Port partner PD identity info. */
> - struct usb_pd_identity p_identity;
> - /* Port cable PD identity info. */
> - struct usb_pd_identity c_identity;
> - struct typec_switch *ori_sw;
> - struct typec_mux *mux;
> - struct typec_retimer *retimer;
> - struct usb_role_switch *role_sw;
> -
> - /* Variables keeping track of switch state. */
> - struct typec_mux_state state;
> - uint8_t mux_flags;
> - uint8_t role;
> -
> - struct typec_altmode *port_altmode[CROS_EC_ALTMODE_MAX];
> -
> - /* Flag indicating that PD partner discovery data parsing is completed. */
> - bool sop_disc_done;
> - bool sop_prime_disc_done;
> - struct ec_response_typec_discovery *disc_data;
> - struct list_head partner_mode_list;
> - struct list_head plug_mode_list;
> -
> - /* PDO-related structs */
> - struct usb_power_delivery *partner_pd;
> - struct usb_power_delivery_capabilities *partner_src_caps;
> - struct usb_power_delivery_capabilities *partner_sink_caps;
> -
> - struct cros_typec_data *typec_data;
> -};
> -
> -/* Platform-specific data for the Chrome OS EC Type C controller. */
> -struct cros_typec_data {
> - struct device *dev;
> - struct cros_ec_device *ec;
> - int num_ports;
> - unsigned int pd_ctrl_ver;
> - /* Array of ports, indexed by port number. */
> - struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS];
> - struct notifier_block nb;
> - struct work_struct port_work;
> - bool typec_cmd_supported;
> - bool needs_mux_ack;
> -};
> -
> static int cros_typec_parse_port_props(struct typec_capability *cap,
> struct fwnode_handle *fwnode,
> struct device *dev)
> diff --git a/drivers/platform/chrome/cros_ec_typec.h b/drivers/platform/chrome/cros_ec_typec.h
> new file mode 100644
> index 000000000000..deda180a646f
> --- /dev/null
> +++ b/drivers/platform/chrome/cros_ec_typec.h
> @@ -0,0 +1,85 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +#ifndef __CROS_EC_TYPEC__
> +#define __CROS_EC_TYPEC__
> +
> +#include <linux/list.h>
> +#include <linux/notifier.h>
> +#include <linux/platform_data/cros_ec_proto.h>
> +#include <linux/usb/pd.h>
> +#include <linux/usb/role.h>
> +#include <linux/usb/typec.h>
> +#include <linux/usb/typec_altmode.h>
> +#include <linux/usb/typec_mux.h>
> +#include <linux/usb/typec_retimer.h>
> +#include <linux/workqueue.h>
> +
> +/* Supported alt modes. */
> +enum {
> + CROS_EC_ALTMODE_DP = 0,
> + CROS_EC_ALTMODE_TBT,
> + CROS_EC_ALTMODE_MAX,
> +};
> +
> +/* Container for altmode pointer nodes. */
> +struct cros_typec_altmode_node {
> + struct typec_altmode *amode;
> + struct list_head list;
> +};
> +
> +/* Platform-specific data for the Chrome OS EC Type C controller. */
> +struct cros_typec_data {
> + struct device *dev;
> + struct cros_ec_device *ec;
> + int num_ports;
> + unsigned int pd_ctrl_ver;
> + /* Array of ports, indexed by port number. */
> + struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS];
> + struct notifier_block nb;
> + struct work_struct port_work;
> + bool typec_cmd_supported;
> + bool needs_mux_ack;
> +};
> +
> +/* Per port data. */
> +struct cros_typec_port {
> + struct typec_port *port;
> + int port_num;
> + /* Initial capabilities for the port. */
> + struct typec_capability caps;
> + struct typec_partner *partner;
> + struct typec_cable *cable;
> + /* SOP' plug. */
> + struct typec_plug *plug;
> + /* Port partner PD identity info. */
> + struct usb_pd_identity p_identity;
> + /* Port cable PD identity info. */
> + struct usb_pd_identity c_identity;
> + struct typec_switch *ori_sw;
> + struct typec_mux *mux;
> + struct typec_retimer *retimer;
> + struct usb_role_switch *role_sw;
> +
> + /* Variables keeping track of switch state. */
> + struct typec_mux_state state;
> + uint8_t mux_flags;
> + uint8_t role;
> +
> + struct typec_altmode *port_altmode[CROS_EC_ALTMODE_MAX];
> +
> + /* Flag indicating that PD partner discovery data parsing is completed. */
> + bool sop_disc_done;
> + bool sop_prime_disc_done;
> + struct ec_response_typec_discovery *disc_data;
> + struct list_head partner_mode_list;
> + struct list_head plug_mode_list;
> +
> + /* PDO-related structs */
> + struct usb_power_delivery *partner_pd;
> + struct usb_power_delivery_capabilities *partner_src_caps;
> + struct usb_power_delivery_capabilities *partner_sink_caps;
> +
> + struct cros_typec_data *typec_data;
> +};
> +
> +#endif /* __CROS_EC_TYPEC__ */
> --
> 2.39.0.314.g84b9a713c41-goog
>
>
--
Benson Leung
Staff Software Engineer
Chrome OS Kernel
Google Inc.
bleung@...gle.com
Chromium OS Project
bleung@...omium.org
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