linux-kernel - Re: [PATCH v3 0/6] Add IRQC support to RZ/G2UL SoC

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Message-ID: <CACRpkdb_6Y63Y5O-Wbh0F_dCqvjxvm3XP3ihMMVZQNgxxPyCJQ@mail.gmail.com>
Date:   Mon, 9 Jan 2023 14:14:21 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Prabhakar <prabhakar.csengg@...il.com>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 0/6] Add IRQC support to RZ/G2UL SoC

On Mon, Jan 2, 2023 at 11:18 PM Prabhakar <prabhakar.csengg@...il.com> wrote:

> This patch series does the following:
> * Adds IRQC support to the RZ/G2UL SoC.
> * Drops mapping NMI interrupt as part of IRQ domain
> * Parses interrupts based in interrupt-names
> * Includes a fix for pinctrl driver when using GPIO pins as interrupts
> * Adds PHY interrupt support for ETH{0/1}

The pinctrl portions look OK to me FWIW
Acked-by: Linus Walleij <linus.walleij@...aro.org>

If any of this is to be merged into the pinctrl tree I expect to get it as
pull request from Geert who maintains the Renesas pinctrl tree,
else tell me what to do!

Yours,
Linus Walleij