lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20230109132944.ipczdt3oj2kpfppn@skbuf>
Date:   Mon, 9 Jan 2023 15:29:44 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     "Hans J. Schultz" <netdev@...io-technology.com>
Cc:     davem@...emloft.net, kuba@...nel.org, netdev@...r.kernel.org,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Eric Dumazet <edumazet@...gle.com>,
        Paolo Abeni <pabeni@...hat.com>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 net-next 2/3] net: dsa: mv88e6xxx: shorten the locked
 section in mv88e6xxx_g1_atu_prob_irq_thread_fn()

On Sun, Jan 08, 2023 at 10:48:48AM +0100, Hans J. Schultz wrote:
> As only the hardware access functions up til and including
> mv88e6xxx_g1_atu_mac_read() called under the interrupt handler
> need to take the chip lock, we release the chip lock after this call.
> The follow up code that handles the violations can run without the
> chip lock held.
> In further patches, the violation handler function will even be
> incompatible with having the chip lock held. This due to an AB/BA
> ordering inversion with rtnl_lock().
> 
> Signed-off-by: Hans J. Schultz <netdev@...io-technology.com>
> ---

Reviewed-by: Vladimir Oltean <olteanv@...il.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ