linux-kernel - [PATCH v6 6/6] ARM: dts: qcom: fix various wrong definition for kpss-acc-v2

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Message-Id: <20230110183259.19142-7-ansuelsmth@gmail.com>
Date:   Tue, 10 Jan 2023 19:32:59 +0100
From:   Christian Marangi <ansuelsmth@...il.com>
To:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Christian Marangi <ansuelsmth@...il.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org
Subject: [PATCH v6 6/6] ARM: dts: qcom: fix various wrong definition for kpss-acc-v2

Fix dtbs_check warning now that we have a correct kpss-acc-v2 yaml
schema.
Change acc node naming to power-controller and add missing
binding #power-domain-cells for each kpss-acc-v2 power-controller
to reflect Documentation schema.

Signed-off-by: Christian Marangi <ansuelsmth@...il.com>
---
 arch/arm/boot/dts/qcom-apq8084.dtsi | 12 ++++++++----
 arch/arm/boot/dts/qcom-ipq4019.dtsi | 12 ++++++++----
 arch/arm/boot/dts/qcom-msm8974.dtsi | 12 ++++++++----
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 4b0d2b4f4b6a..51c5867eb950 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -353,28 +353,32 @@ saw_l2: power-controller@...12000 {
 			regulator;
 		};
 
-		acc0: clock-controller@...88000 {
+		acc0: power-controller@...88000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9088000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@...98000 {
+		acc1: power-controller@...98000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9098000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@...a8000 {
+		acc2: power-controller@...a8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90a8000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@...b8000 {
+		acc3: power-controller@...b8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90b8000 0x1000>,
 			      <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		restart@...ab000 {
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index acb08dcf9442..ee464aedece9 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -325,24 +325,28 @@ crypto: crypto@...a000 {
 			status = "disabled";
 		};
 
-		acc0: clock-controller@...8000 {
+		acc0: power-controller@...8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b088000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@...8000 {
+		acc1: power-controller@...8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b098000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@...8000 {
+		acc2: power-controller@...8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b0a8000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@...8000 {
+		acc3: power-controller@...8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0x0b0b8000 0x1000>, <0xb008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		saw0: regulator@...9000 {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 4b485f5612c4..59613aa52e25 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -416,24 +416,28 @@ saw_l2: power-controller@...12000 {
 			regulator;
 		};
 
-		acc0: clock-controller@...88000 {
+		acc0: power-controller@...88000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc1: clock-controller@...98000 {
+		acc1: power-controller@...98000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc2: clock-controller@...a8000 {
+		acc2: power-controller@...a8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
-		acc3: clock-controller@...b8000 {
+		acc3: power-controller@...b8000 {
 			compatible = "qcom,kpss-acc-v2";
 			reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
+			#power-domain-cells = <0>;
 		};
 
 		sdhc_1: mmc@...24900 {
-- 
2.37.2