lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <3f7e4e82d42d4c1791afa346f8b62870@EXMBX168.cuchost.com>
Date:   Tue, 10 Jan 2023 07:45:17 +0000
From:   JiaJie Ho <jiajie.ho@...rfivetech.com>
To:     Herbert Xu <herbert@...dor.apana.org.au>
CC:     Olivia Mackall <olivia@...enic.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Conor Dooley <conor.dooley@...rochip.com>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
Subject: RE: [PATCH v3 2/3] hwrng: starfive - Add TRNG driver for StarFive SoC



> -----Original Message-----
> From: Herbert Xu <herbert@...dor.apana.org.au>
> Sent: 10 January, 2023 3:41 PM
> To: JiaJie Ho <jiajie.ho@...rfivetech.com>
> Cc: Olivia Mackall <olivia@...enic.com>; Rob Herring <robh+dt@...nel.org>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>; Emil Renner
> Berthing <kernel@...il.dk>; Conor Dooley <conor.dooley@...rochip.com>;
> linux-crypto@...r.kernel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org; linux-riscv@...ts.infradead.org
> Subject: Re: [PATCH v3 2/3] hwrng: starfive - Add TRNG driver for StarFive
> SoC
> 
> On Tue, Jan 10, 2023 at 12:52:48AM +0800, Jia Jie Ho wrote:
> >
> > +static irqreturn_t starfive_trng_irq(int irq, void *priv) {
> > +	u32 status;
> > +	struct starfive_trng *trng = (struct starfive_trng *)priv;
> > +
> > +	status = readl(trng->base + STARFIVE_ISTAT);
> > +	if (status & STARFIVE_ISTAT_RAND_RDY) {
> > +		writel(STARFIVE_ISTAT_RAND_RDY, trng->base +
> STARFIVE_ISTAT);
> > +		complete(&trng->random_done);
> > +	}
> > +
> > +	if (status & STARFIVE_ISTAT_SEED_DONE) {
> > +		writel(STARFIVE_ISTAT_SEED_DONE, trng->base +
> STARFIVE_ISTAT);
> > +		complete(&trng->reseed_done);
> > +	}
> > +
> > +	if (status & STARFIVE_ISTAT_LFSR_LOCKUP) {
> > +		writel(STARFIVE_ISTAT_LFSR_LOCKUP, trng->base +
> STARFIVE_ISTAT);
> > +		/* SEU occurred, reseeding required*/
> > +		writel(STARFIVE_CTRL_EXEC_RANDRESEED, trng->base +
> STARFIVE_CTRL);
> 
> This could occur at the same time as a GENE_RANDNUM write so perhaps
> you should add some locking?
> 

I'll add those in the next version.

> > +	ret = devm_request_irq(&pdev->dev, irq, starfive_trng_irq, 0, pdev-
> >name,
> > +			       (void *)trng);
> > +	if (ret)
> > +		return dev_err_probe(&pdev->dev, irq,
> > +				     "Failed to register interrupt handler\n");
> 
> ...
> 
> > +	init_completion(&trng->random_done);
> > +	init_completion(&trng->reseed_done);
> 
> These completion initialisations should be moved above the IRQ registration
> because you should always be prepared to get spurious interrupts.
> 

Will update these too.

> Otherwise the patch looks good.
> 

Thanks again for reviewing the patch and providing the useful feedbacks.

Best regards,
Jia Jie

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ