linux-kernel - Re: [PATCH -v2] x86/boot/compressed: Register dummy NMI handler in EFI boot loader, to avoid kdump crashes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <fb27e5cf-9056-3698-9e6f-9386f9cdf991@huawei.com>
Date:   Wed, 11 Jan 2023 11:46:40 +0800
From:   Zeng Heng <zengheng4@...wei.com>
To:     Borislav Petkov <bp@...en8.de>
CC:     Ingo Molnar <mingo@...nel.org>, <michael.roth@....com>,
        <hpa@...or.com>, <tglx@...utronix.de>,
        <sathyanarayanan.kuppuswamy@...ux.intel.com>,
        <kirill.shutemov@...ux.intel.com>, <jroedel@...e.de>,
        <keescook@...omium.org>, <mingo@...hat.com>,
        <dave.hansen@...ux.intel.com>, <brijesh.singh@....com>,
        <linux-kernel@...r.kernel.org>, <x86@...nel.org>,
        <liwei391@...wei.com>
Subject: Re: [PATCH -v2] x86/boot/compressed: Register dummy NMI handler in
 EFI boot loader, to avoid kdump crashes

On 2023/1/10 22:53, Borislav Petkov wrote:
> On Tue, Jan 10, 2023 at 08:32:07PM +0800, Zeng Heng wrote:
>> And here is the context of mce-inject:
>>
>> #0  relocate_kernel () at arch/x86/kernel/relocate_kernel_64.S:55
>> #1  0xffffffff81a57fc2 in machine_kexec (image=0xffff888101ef8400)
>>      at arch/x86/kernel/machine_kexec_64.c:391
> Before we continue with this any further: are you doing this "exercise" in
> qemu/kvm and nothing of that is happening on real hardware?

Real hardware and QEMU both can reproduce the issue.

Here is description about NMI from Intel 64 and IA-32 Architectures 
Software Developer's Manual in chapter 6.7.1:

While an NMI interrupt handler is executing, the processor blocks 
delivery of subsequent NMIs until the next execu.tion of the IRET 
instruction. This blocking of NMIs prevents nested execution of the NMI 
handler. It is recommended that the NMI interrupt handler be accessed 
through an interrupt gate to disable maskable hardware interrupts (see 
Section 6.8.1, “Masking Maskable Hardware Interrupts”).