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Message-ID: <603f9c39-3e36-bb44-2305-1d37fe033dd5@linaro.org>
Date: Wed, 11 Jan 2023 10:36:12 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: devi priya <quic_devipriy@...cinc.com>, agross@...nel.org,
andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
sboyd@...nel.org, linus.walleij@...aro.org,
catalin.marinas@....com, will@...nel.org, p.zabel@...gutronix.de,
shawnguo@...nel.org, arnd@...db.de, marcel.ziswiler@...adex.com,
dmitry.baryshkov@...aro.org, nfraprado@...labora.com,
broonie@...nel.org, tdas@...eaurora.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc: quic_srichara@...cinc.com, quic_gokulsri@...cinc.com,
quic_sjaganat@...cinc.com, quic_kathirav@...cinc.com,
quic_arajkuma@...cinc.com, quic_anusha@...cinc.com,
quic_poovendh@...cinc.com
Subject: Re: [PATCH 1/7] dt-bindings: arm64: ipq9574: Add binding descriptions
for clock and reset
On 10/01/2023 13:13, devi priya wrote:
> Adding support for the global clock controller found on
> IPQ9574 based devices
Subject: drop second/last, redundant "bindings descriptions for". The
"dt-bindings" prefix is already stating that these are bindings.
>
> Co-developed-by: Anusha Rao <quic_anusha@...cinc.com>
> Signed-off-by: Anusha Rao <quic_anusha@...cinc.com>
> Signed-off-by: devi priya <quic_devipriy@...cinc.com>
> ---
> .../bindings/clock/qcom,gcc-other.yaml | 4 +
> .../devicetree/bindings/clock/qcom,gcc.yaml | 9 +-
> include/dt-bindings/clock/qcom,gcc-ipq9574.h | 226 ++++++++++++++++++
> include/dt-bindings/reset/qcom,gcc-ipq9574.h | 164 +++++++++++++
> 4 files changed, 402 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq9574.h
> create mode 100644 include/dt-bindings/reset/qcom,gcc-ipq9574.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
> index 2e8acca64af1..cc563d640336 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
> @@ -18,6 +18,8 @@ description: |
> include/dt-bindings/clock/qcom,gcc-ipq4019.h
> include/dt-bindings/clock/qcom,gcc-ipq6018.h
> include/dt-bindings/reset/qcom,gcc-ipq6018.h
> + include/dt-bindings/clock/qcom,gcc-ipq9574.h
> + include/dt-bindings/reset/qcom,gcc-ipq9574.h
> include/dt-bindings/clock/qcom,gcc-msm8953.h
> include/dt-bindings/clock/qcom,gcc-mdm9607.h
> include/dt-bindings/clock/qcom,gcc-mdm9615.h
> @@ -34,6 +36,8 @@ properties:
> - qcom,gcc-mdm9607
> - qcom,gcc-msm8953
> - qcom,gcc-mdm9615
> + - qcom,gcc-ipq9574
Incorrect order but anyway let's switch to new naming style just like
SM8550 and SA8775p.
> +
Not related change.
>
> required:
> - compatible
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
> index 7129fbcf2b6c..5a71268538e6 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
> @@ -24,6 +24,14 @@ properties:
> '#power-domain-cells':
> const: 1
>
> + clocks:
> + minItems: 1
> + maxItems: 8
> +
> + clock-names:
> + minItems: 1
> + maxItems: 8
This does not look correct, neither related.
> +
> reg:
> maxItems: 1
>
> @@ -35,7 +43,6 @@ required:
> - reg
> - '#clock-cells'
> - '#reset-cells'
> - - '#power-domain-cells'
Eee? Why? What's this?
Best regards,
Krzysztof
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