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Message-ID: <c5dc8042-717b-22eb-79f6-d18ab10d6685@linaro.org>
Date: Wed, 11 Jan 2023 11:00:02 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Mukesh Ojha <quic_mojha@...cinc.com>, agross@...nel.org,
andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8450: Add TCSR halt register space
On 11/01/2023 10:59, Krzysztof Kozlowski wrote:
> On 11/01/2023 10:20, Mukesh Ojha wrote:
>> Add TCSR register space and refer it from scm node, so that
>> it can be used by SCM driver.
>>
>> Signed-off-by: Mukesh Ojha <quic_mojha@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index 5704750..e0fa733 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -270,6 +270,7 @@
>> firmware {
>> scm: scm {
>> compatible = "qcom,scm-sm8450", "qcom,scm";
>> + qcom,dload-mode = <&tcsr 0x13000>;
>> interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
>> #reset-cells = <1>;
>> };
>> @@ -1986,6 +1987,11 @@
>> #hwlock-cells = <1>;
>> };
>>
>> + tcsr: syscon@...0000 {
>> + compatible = "syscon";
>
> This is not allowed by itself.
Eh, that was not proper English... I wanted to say: This is not allowed
on its own. You need specific compatible. ALWAYS.
> You should have warnings when running
> dtbs_check.
>
> Best regards,
> Krzysztof
>
Best regards,
Krzysztof
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