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Message-ID: <Y77PwoqlfUS5JK7q@intel.com>
Date: Wed, 11 Jan 2023 17:03:30 +0200
From: Ville Syrjälä <ville.syrjala@...ux.intel.com>
To: Brian Norris <briannorris@...omium.org>,
Heiko Stübner <heiko@...ech.de>,
Sean Paul <seanpaul@...omium.org>,
Michel Dänzer <michel.daenzer@...lbox.org>,
linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
Sandy Huang <hjc@...k-chips.com>,
linux-rockchip@...ts.infradead.org, stable@...r.kernel.org
Subject: Re: [PATCH 1/2] drm/atomic: Allow vblank-enabled + self-refresh
"disable"
On Fri, Jan 06, 2023 at 09:30:56PM +0100, Daniel Vetter wrote:
> On Fri, Jan 06, 2023 at 11:33:06AM -0800, Brian Norris wrote:
> > On Fri, Jan 06, 2023 at 07:17:53PM +0100, Daniel Vetter wrote:
> > > - fake vblanks with hrtimer, because on most hw when you turn off the crtc
> > > the vblanks are also turned off, and so your compositor would still
> > > hang. The vblank machinery already has all the code to make this happen
> > > (and if it's not all, then i915 psr code should have it).
> >
> > Is a timer better than an interrupt? I'm pretty sure the vblank
> > interrupts still can fire on Rockchip CRTC (VOP) (see also the other
> > branch of this thread), so this isn't really necessary. (IGT vblank
> > tests pass without hanging.) Unless you simply prefer a fake timer for
> > some reason.
> >
> > Also, I still haven't found that fake timer machinery, but maybe I just
> > don't know what I'm looking for.
>
> I ... didn't find it either. I'm honestly not sure whether this works for
> intel, or whether we do something silly like disable self-refresh when a
> vblank interrupt is pending :-/
Intel hardware doesn't enter PSR while the vblank interrupt is enabled.
--
Ville Syrjälä
Intel
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