linux-kernel - Re: [PATCH v4 3/5] ARM: dts: add GXP Support for fans and SPI

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Message-ID: <1E4BFECB-D29A-43CE-A521-F2A81939202F@hpe.com>
Date:   Thu, 12 Jan 2023 19:58:23 +0000
From:   "Hawkins, Nick" <nick.hawkins@....com>
To:     Arnd Bergmann <arnd@...db.de>
CC:     "Verdun, Jean-Marie" <verdun@....com>,
        Jean Delvare <jdelvare@...e.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Rob Herring <robh+dt@...nel.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        Jonathan Corbet <corbet@....net>,
        Russell King <linux@...linux.org.uk>,
        "linux-hwmon@...r.kernel.org" <linux-hwmon@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v4 3/5] ARM: dts: add GXP Support for fans and SPI

> If the two ranges are actually translated separately on the
> bus, you could also decide to enumerate the translations with
> a 64-bit local address and make the upper word an enumeration,
> such as

> ranges = <0x1 0x0 0x80000000 0xf000000>,
> <0x2 0x0 0xc0000000 0x30000000>;

I am not finding a good example on how this would affect the node
addresses and reg properties. I believe I will stick with the current
format if that is acceptable.

> Now it almost matches, except for the final byte, as the
> range actually ends at 0xfffffffe not 0xffffffff if you make
> the size one byte less than 1GB.

> Is there a special register in the last byte?

No there is not I will now have ranges as:

ranges = <0x0 0x80000000 0xf000000>, /* 0x80000000 - 0x8f000000 */
                <0x40000000 0xc0000000 0x40000000>; /* 0xc0000000 - 0xffffffff */

> I suppose the physical address in the old mapping was actually
> outside of the 0xc0000000-0xefffffff range, so it wasn't
> even accessible. If the addresses are interpreted to wrap around
> at the end of the mapping, that would have made the CPU visible
> address 0xe0f00000 (0xc0000000 + (0x80f00000 % 0x30000000)).
> If it just wrapped around as a 32-bit number, it would be
> 0x40f00000 ((0xc0000000 + 0x80f00000)% 0x100000000), but I
> don't see you you'd get to 80f00000.

It was not intended to wrap around; it was an error before and was
not accessible.

The updated section of the device tree will be:

ahb@...00000 {
                        compatible = "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x0 0x80000000 0xf000000>, /* 0x80000000 - 0x8f000000 */
                                 <0x40000000 0xc0000000 0x40000000>; /* 0xc0000000 - 0xffffffff */
                        dma-ranges;

                      ...

                       vic0: interrupt-controller@...f0000 { /* 0xceff0000 */
                                compatible = "arm,pl192-vic";
                                reg = <0x4eff0000 0x1000>;
                                interrupt-controller;
                                #interrupt-cells = <1>;
                        };

                        vic1: interrupt-controller@...000 { /* 0x80f00000 */
                                compatible = "arm,pl192-vic";
                                reg = <0xf00000 0x1000>;
                                interrupt-controller;
                                #interrupt-cells = <1>;
                        };

                        ...
};

Thanks,

-Nick Hawkins