linux-kernel - Re: [PATCH kernel v2 1/3] x86/amd: Cache values in percpu variables

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <61fde9ac-e24f-c765-a9a8-91fac60b9cb3@amd.com>
Date:   Thu, 12 Jan 2023 16:21:28 +1100
From:   Alexey Kardashevskiy <aik@....com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     kvm@...r.kernel.org, x86@...nel.org, linux-kernel@...r.kernel.org,
        Venu Busireddy <venu.busireddy@...cle.com>,
        Tony Luck <tony.luck@...el.com>,
        Tom Lendacky <thomas.lendacky@....com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Sean Christopherson <seanjc@...gle.com>,
        Sandipan Das <sandipan.das@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Michael Roth <michael.roth@....com>,
        Mario Limonciello <mario.limonciello@....com>,
        Jan Kara <jack@...e.cz>, Ingo Molnar <mingo@...hat.com>,
        Huang Rui <ray.huang@....com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
        Brijesh Singh <brijesh.singh@....com>,
        Arnaldo Carvalho de Melo <acme@...hat.com>,
        Andrew Cooper <andrew.cooper3@...rix.com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        "Jason A. Donenfeld" <Jason@...c4.com>,
        "H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH kernel v2 1/3] x86/amd: Cache values in percpu variables



On 11/1/23 03:05, Borislav Petkov wrote:
> On Fri, Dec 09, 2022 at 03:38:02PM +1100, Alexey Kardashevskiy wrote:
> 
> Make that Subject:
> 
> "x86/amd: Cache debug register values in percpu variables"
> 
> to make it less generic and more specific as to what you're doing.
> 
>> Reading DR[0-3]_ADDR_MASK MSRs takes about 250 cycles which is going to
>> be noticeable with the AMD KVM SEV-ES DebugSwap feature enabled.
>> KVM is going to store host's DR[0-3] and DR[0-3]_ADDR_MASK before
>> switching to a guest; the hardware is going to swap these on VMRUN
>> and VMEXIT.
>>
>> Store MSR values passsed to set_dr_addr_mask() in percpu values
> 
> s/values/variables/
> 
> Unknown word [passsed] in commit message.
> 
> Use a spellchecker pls.
> 
>> (when changed) and return them via new amd_get_dr_addr_mask().
>> The gain here is about 10x.
> 
> 10x when reading percpu vars vs MSR reads?
> 
> Oh well.
 >
>> As amd_set_dr_addr_mask() uses the array too, change the @dr type to
>> unsigned to avoid checking for <0.
> 
> I feel ya but that function will warn once, return 0 when the @dr number is
> outta bounds and that 0 will still get used as an address mask.

"that function" is set_dr_addr_mask() (btw should I rename it to start 
with amd_? the commit log uses the wrong&longer name) which does not 
return a mask, amd_get_dr_addr_mask() does.

> I think you really wanna return negative on error and the caller should not
> continue in that case.

If it is out of bounds, it won't neither set or get. And these 2 helpers 
are used only by the kernel and the callers pass 0..3 and nothing else. 
BUG_ON() would do too, for example.


>> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
>> index c75d75b9f11a..9ac5a19f89b9 100644
>> --- a/arch/x86/kernel/cpu/amd.c
>> +++ b/arch/x86/kernel/cpu/amd.c
>> @@ -1158,24 +1158,41 @@ static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
>>   	return false;
>>   }
>>   
>> -void set_dr_addr_mask(unsigned long mask, int dr)
>> +DEFINE_PER_CPU_READ_MOSTLY(unsigned long[4], amd_dr_addr_mask);
> 
> static
> 
>> +
>> +static unsigned int amd_msr_dr_addr_masks[] = {
>> +	MSR_F16H_DR0_ADDR_MASK,
>> +	MSR_F16H_DR1_ADDR_MASK - 1 + 1,
> 
> - 1 + 1 ?
> 
> Why?
> 
> Because of the DR0 and then DR1 being in a different MSR range?

Yup.

> 
> Who cares, make it simple:
> 
> 	MSR_F16H_DR0_ADDR_MASK,
> 	MSR_F16H_DR1_ADDR_MASK,
> 	MSR_F16H_DR1_ADDR_MASK + 1,
> 	MSR_F16H_DR1_ADDR_MASK + 2
> 
> and add a comment if you want to denote the non-contiguous range but meh.

imho having 1,2,3 in the code eliminates the need in a comment and 
produces the exact same end result. But since nobody cares, I'll do it 
the shorter way with just +1 and +2.


> >> +	MSR_F16H_DR1_ADDR_MASK - 1 + 2,
>> +	MSR_F16H_DR1_ADDR_MASK - 1 + 3
>> +};
>> +
>> +void set_dr_addr_mask(unsigned long mask, unsigned int dr)
>>   {
>> -	if (!boot_cpu_has(X86_FEATURE_BPEXT))
>> +	if (!cpu_feature_enabled(X86_FEATURE_BPEXT))
>>   		return;
>>   
>> -	switch (dr) {
>> -	case 0:
>> -		wrmsr(MSR_F16H_DR0_ADDR_MASK, mask, 0);
>> -		break;
>> -	case 1:
>> -	case 2:
>> -	case 3:
>> -		wrmsr(MSR_F16H_DR1_ADDR_MASK - 1 + dr, mask, 0);
>> -		break;
>> -	default:
>> -		break;
>> -	}
>> +	if (WARN_ON_ONCE(dr >= ARRAY_SIZE(amd_msr_dr_addr_masks)))
>> +		return;
>> +
>> +	if (per_cpu(amd_dr_addr_mask, smp_processor_id())[dr] == mask)
> 
> Do that at function entry:
> 
> 	int cpu = smp_processor_id();
> 
> and use cpu here.

Sure. Out of curiosity - why?^w^w^w^w^  it reduced the vmlinux size by 
48 bytes, nice.

Thanks for the review!


> 
>> +		return;
>> +
>> +	wrmsr(amd_msr_dr_addr_masks[dr], mask, 0);
>> +	per_cpu(amd_dr_addr_mask, smp_processor_id())[dr] = mask;
>> +}
> 
> Thx.
> 

-- 
Alexey