lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <74fe4cb1-9306-75a6-8adc-f7bb9191feb4@arm.com>
Date:   Thu, 12 Jan 2023 09:33:57 +0100
From:   Pierre Gondois <pierre.gondois@....com>
To:     LKML <linux-kernel@...r.kernel.org>
Cc:     Khuong Dinh <khuong@...amperecomputing.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v2 04/23] arm64: dts: Update cache properties for apm

(subset for cc list)
Hello,
Just a reminder in case the patch was forgotten,
Regards,
Pierre

On 11/7/22 16:56, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> The 'cache-unified' property should be present if one of the
> properties for unified cache is present ('cache-size', ...).
> 
> Update the Device Trees accordingly.
> 
> Signed-off-by: Pierre Gondois <pierre.gondois@....com>
> ---
>   arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++
>   arch/arm64/boot/dts/apm/apm-storm.dtsi     | 4 ++++
>   2 files changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> index a8526f8157ec..68ba865fcd58 100644
> --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi
> @@ -97,15 +97,19 @@ cpu@301 {
>   		};
>   		xgene_L2_0: l2-cache-0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_1: l2-cache-1 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_2: l2-cache-2 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_3: l2-cache-3 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
> index f56d687f772d..9ac7417f65eb 100644
> --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
> +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
> @@ -81,15 +81,19 @@ cpu@301 {
>   		};
>   		xgene_L2_0: l2-cache-0 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_1: l2-cache-1 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_2: l2-cache-2 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   		xgene_L2_3: l2-cache-3 {
>   			compatible = "cache";
> +			cache-level = <2>;
>   		};
>   	};
>   

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ