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Message-ID: <f4cbb6ad-36de-bd9c-cd76-37d13e43ba0f@microchip.com>
Date:   Thu, 12 Jan 2023 09:18:01 +0000
From:   <Claudiu.Beznea@...rochip.com>
To:     <Eugen.Hristev@...rochip.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-media@...r.kernel.org>, <hverkuil@...all.nl>
CC:     <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <Nicolas.Ferre@...rochip.com>, <jacopo@...ndi.org>
Subject: Re: [PATCH v10 3/5] ARM: dts: at91: sama7g5: add nodes for video
 capture

On 03.05.2022 12:51, Eugen Hristev wrote:
> Add node for the XISC (eXtended Image Sensor Controller) and CSI2DC
> (csi2 demux controller).
> These nodes represent the top level of the video capture hardware pipeline
> and are directly connected in hardware.
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@...rochip.com>

Applied to at91-dt, thanks!

> ---
> Changes in v10:
> - nodes disabled by default
> 
>  arch/arm/boot/dts/sama7g5.dtsi | 51 ++++++++++++++++++++++++++++++++++
>  1 file changed, 51 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index 4decd3a91a76..fe9c6df9819b 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -454,6 +454,57 @@ sdmmc2: mmc@...0c000 {
>  			status = "disabled";
>  		};
>  
> +		csi2dc: csi2dc@...04000 {
> +			compatible = "microchip,sama7g5-csi2dc";
> +			reg = <0xe1404000 0x500>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 34>, <&xisc>;
> +			clock-names = "pclk", "scck";
> +			assigned-clocks = <&xisc>;
> +			assigned-clock-rates = <266000000>;
> +			status = "disabled";
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				port@0 {
> +					reg = <0>;
> +					csi2dc_in: endpoint {
> +					};
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +					csi2dc_out: endpoint {
> +						bus-width = <14>;
> +						hsync-active = <1>;
> +						vsync-active = <1>;
> +						remote-endpoint = <&xisc_in>;
> +					};
> +				};
> +			};
> +		};
> +
> +		xisc: xisc@...08000 {
> +			compatible = "microchip,sama7g5-isc";
> +			reg = <0xe1408000 0x2000>;
> +			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 56>;
> +			clock-names = "hclock";
> +			#clock-cells = <0>;
> +			clock-output-names = "isc-mck";
> +			status = "disabled";
> +
> +			port {
> +				xisc_in: endpoint {
> +					bus-type = <5>; /* Parallel */
> +					bus-width = <14>;
> +					hsync-active = <1>;
> +					vsync-active = <1>;
> +					remote-endpoint = <&csi2dc_out>;
> +				};
> +			};
> +		};
> +
>  		pwm: pwm@...04000 {
>  			compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm";
>  			reg = <0xe1604000 0x4000>;

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