[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y7/iIKl/F8MOrVdD@zn.tnic>
Date: Thu, 12 Jan 2023 11:34:08 +0100
From: Borislav Petkov <bp@...en8.de>
To: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
Cc: Breno Leitao <leitao@...ian.org>, tglx@...utronix.de,
mingo@...hat.com, dave.hansen@...ux.intel.com, hpa@...or.com,
jpoimboe@...nel.org, peterz@...radead.org, x86@...nel.org,
cascardo@...onical.com, leit@...a.com, kexec@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] x86/bugs: Explicitly clear speculative MSR bits
On Wed, Jan 11, 2023 at 11:00:37PM -0800, Pawan Gupta wrote:
> > SPEC_CTRL_RRSBA_DIS_S is a disable bit and I presume it needs to stay enabled.
>
> The mitigation is enabled when this bit is set. When set, it prevents RET
> target to be predicted from alternate predictors (BTB). This should stay
> 0, unless enabled by a mitigation mode.
>
> > Only when spec_ctrl_disable_kernel_rrsba() runs. And I'd say perf-wise it
> > doesn't cost that much...
>
> I guess this doesn't matter now, because this patch is resetting it by
> default that keeps the mitigation disabled with no perf impact.
Ok, lemme queue it then.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
Powered by blists - more mailing lists