linux-kernel - Re: [PATCH v3 1/3] coresight: cti: Prevent negative values of enable count

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAJ9a7Vh2jc+62head4H2R4W4heGOiR4xTQCTRFMT5G5gPbLexw@mail.gmail.com>
Date:   Thu, 12 Jan 2023 14:42:41 +0000
From:   Mike Leach <mike.leach@...aro.org>
To:     James Clark <james.clark@....com>
Cc:     coresight@...ts.linaro.org, quic_jinlmao@...cinc.com,
        suzuki.poulose@....com,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] coresight: cti: Prevent negative values of enable count

On Tue, 10 Jan 2023 at 11:08, James Clark <james.clark@....com> wrote:
>
> Writing 0 to the enable control repeatedly results in a negative value
> for enable_req_count. After this, writing 1 to the enable control
> appears to not work until the count returns to positive.
>
> Change it so that it's impossible for enable_req_count to be < 0.
> Return an error to indicate that the disable request was invalid.
>
> Fixes: 835d722ba10a ("coresight: cti: Initial CoreSight CTI Driver")
> Tested-by: Jinlong Mao <quic_jinlmao@...cinc.com>
> Signed-off-by: James Clark <james.clark@....com>
> ---
>  drivers/hwtracing/coresight/coresight-cti-core.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwtracing/coresight/coresight-cti-core.c
> index d2cf4f4848e1..838872f2484d 100644
> --- a/drivers/hwtracing/coresight/coresight-cti-core.c
> +++ b/drivers/hwtracing/coresight/coresight-cti-core.c
> @@ -151,9 +151,16 @@ static int cti_disable_hw(struct cti_drvdata *drvdata)
>  {
>         struct cti_config *config = &drvdata->config;
>         struct coresight_device *csdev = drvdata->csdev;
> +       int ret = 0;
>
>         spin_lock(&drvdata->spinlock);
>
> +       /* don't allow negative refcounts, return an error */
> +       if (!atomic_read(&drvdata->config.enable_req_count)) {
> +               ret = -EINVAL;
> +               goto cti_not_disabled;
> +       }
> +
>         /* check refcount - disable on 0 */
>         if (atomic_dec_return(&drvdata->config.enable_req_count) > 0)
>                 goto cti_not_disabled;
> @@ -171,12 +178,12 @@ static int cti_disable_hw(struct cti_drvdata *drvdata)
>         coresight_disclaim_device_unlocked(csdev);
>         CS_LOCK(drvdata->base);
>         spin_unlock(&drvdata->spinlock);
> -       return 0;
> +       return ret;
>
>         /* not disabled this call */
>  cti_not_disabled:
>         spin_unlock(&drvdata->spinlock);
> -       return 0;
> +       return ret;
>  }
>
>  void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value)
> --
> 2.25.1
>

reviewed-by: Mike Leach <mike.leach@...aro.org>
-- 
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK