linux-kernel - Re: [PATCH v2 1/2] arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes

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Date:   Thu, 12 Jan 2023 16:34:42 +0100
From:   Johan Hovold <johan@...nel.org>
To:     Abel Vesa <abel.vesa@...aro.org>
Cc:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: sm8550: Add UFS host controller
 and phy nodes

On Thu, Jan 12, 2023 at 03:59:25PM +0200, Abel Vesa wrote:
> Add UFS host controller and PHY nodes.
> 
> Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
> ---
> 
> Changes since v1:
>  * dropped ufs_mem_phy_lanes child node, like Johan suggested
>  * addressed Konrad comments.
 
> @@ -1571,6 +1571,78 @@ crypto: crypto@...0000 {
>  			interconnect-names = "memory";
>  		};
>  
> +		ufs_mem_phy: phy@...0000 {
> +			compatible = "qcom,sm8550-qmp-ufs-phy";
> +			reg = <0x0 0x01d80000 0x0 0x2000>;
> +			clock-names = "ref", "qref";
> +			clocks = <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
> +				 <&tcsr TCSR_UFS_CLKREF_EN>;

So as I just mentioned elsewhere, this should probably be 'ref' and
'ref_aux' (in reverse order).

> +
> +			power-domains = <&gcc UFS_MEM_PHY_GDSC>;
> +
> +			resets = <&ufs_mem_hc 0>;
> +			reset-names = "ufsphy";
> +
> +			#address-cells = <2>;
> +			#size-cells = <2>;

These two should not be here.

> +
> +			#phy-cells = <0>;
> +

You can drop the newline here.

> +			#clock-cells = <1>;

Could be moved above '#phy-cells' to have the provider cells nodes
sorted alphabetically.

> +
> +			ranges;

Drop this one too.

> +
> +			status = "disabled";
> +		};

Johan