[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y8F1ljVyVST+aSu4@lpieralisi>
Date: Fri, 13 Jan 2023 16:15:34 +0100
From: Lorenzo Pieralisi <lpieralisi@...nel.org>
To: Vidya Sagar <vidyas@...dia.com>
Cc: robh@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
thierry.reding@...il.com, jonathanh@...dia.com, kishon@...com,
vkoul@...nel.org, mani@...nel.org,
Sergey.Semin@...kalelectronics.ru, ffclaire1224@...il.com,
linux-pci@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
kthota@...dia.com, mmaddireddy@...dia.com, sagar.tv@...il.com
Subject: Re: [PATCH V3 04/21] PCI: tegra194: Handle errors in BPMP response
On Fri, Oct 14, 2022 at 12:08:37AM +0530, Vidya Sagar wrote:
> The return value from tegra_bpmp_transfer indicates the success or
> failure of the IPC transaction with BPMP. If the transaction
> succeeded, we also need to check the actual command's result code.
> Add code to do this.
>
> Signed-off-by: Vidya Sagar <vidyas@...dia.com>
> ---
> V3:
> * None
>
> V2:
> * None
>
> drivers/pci/controller/dwc/pcie-tegra194.c | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
> index 685aee378c93..ae7e0d8f693b 100644
> --- a/drivers/pci/controller/dwc/pcie-tegra194.c
> +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
> @@ -1260,6 +1260,7 @@ static int tegra_pcie_bpmp_set_ctrl_state(struct tegra_pcie_dw *pcie,
> struct mrq_uphy_response resp;
> struct tegra_bpmp_message msg;
> struct mrq_uphy_request req;
> + int err;
>
> /*
> * Controller-5 doesn't need to have its state set by BPMP-FW in
> @@ -1282,7 +1283,13 @@ static int tegra_pcie_bpmp_set_ctrl_state(struct tegra_pcie_dw *pcie,
> msg.rx.data = &resp;
> msg.rx.size = sizeof(resp);
>
> - return tegra_bpmp_transfer(pcie->bpmp, &msg);
> + err = tegra_bpmp_transfer(pcie->bpmp, &msg);
> + if (err)
> + return err;
> + if (msg.rx.ret)
> + return -EINVAL;
> +
> + return 0;
> }
>
> static int tegra_pcie_bpmp_set_pll_state(struct tegra_pcie_dw *pcie,
> @@ -1291,6 +1298,7 @@ static int tegra_pcie_bpmp_set_pll_state(struct tegra_pcie_dw *pcie,
> struct mrq_uphy_response resp;
> struct tegra_bpmp_message msg;
> struct mrq_uphy_request req;
> + int err;
>
> memset(&req, 0, sizeof(req));
> memset(&resp, 0, sizeof(resp));
> @@ -1310,7 +1318,13 @@ static int tegra_pcie_bpmp_set_pll_state(struct tegra_pcie_dw *pcie,
> msg.rx.data = &resp;
> msg.rx.size = sizeof(resp);
>
> - return tegra_bpmp_transfer(pcie->bpmp, &msg);
> + err = tegra_bpmp_transfer(pcie->bpmp, &msg);
> + if (err)
> + return err;
> + if (msg.rx.ret)
> + return -EINVAL;
I wonder whether you can embed the return value check within
the function itself.
Lorenzo
> +
> + return 0;
> }
>
> static void tegra_pcie_downstream_dev_to_D0(struct tegra_pcie_dw *pcie)
> --
> 2.17.1
>
>
> --
> linux-phy mailing list
> linux-phy@...ts.infradead.org
> https://lists.infradead.org/mailman/listinfo/linux-phy
Powered by blists - more mailing lists